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  • Part No.W83195CG-NP
    ManufacturerNUVOTON
    Size411 Kbytes
    Pages26 pages
    DescriptionWinbond Clock Generator W83195CG-NP For Intel Napa Platform
    Datasheet Summary with AI

    1. Overview and Functionality

    ️· Device: Winbond W83195CG-NP
    ️· Type: Power Management and System Monitoring Chipset
    ️· Interface: I²C Serial Bus (address 0xD2)
    ️· Purpose: Controls and monitors various system parameters related to power, clocks, and system health. Includes a set of registers for configuration and status retrieval.

    2. Clock Generation and Frequency Support

    ️· Supports CPU frequencies from 100 MHz to 400 MHz
    ️· PCI frequency support: 33.3 MHz
    ️· Offers flexibility to select CPU_ITP or SRCCLK output clocks.
    ️· Registers allow for stopping clocks (CPUCLK0_FS, CPUCLK1_FS, CPUCLK2_FS, PCIF_0, PCIF_1)

    3. Registers & Features (Key Summary - see full list in document)

    ️· Register 0 (Chip ID): Provides Winbond Chip ID.
    ️· Register 5: Includes `SEL_ITP` for selecting ITP or SRCCLK output, and `CPUCLK*_FS` registers for enabling stop features for CPU clocks.
    ️· Register 6: Contains `FSC_BACK`, `FSB_BACK`, and `FSA_BACK` - power-on latched values for various signals. Includes `PCI/SRCCLK_STOP` to disable PCI and SRCCLK outputs.
    ️· Register 7: Chip Identification Register, providing data for identification.
    ️· Offers "back" registers (FSA_BACK, FSB_BACK, FSC_BACK) for power-on latched signal values.
    ️· Registers for controlling clock stop features, essential for power saving and system management.

    4. Electrical Characteristics

    ️· Supply Voltage:
    - VDD = 3.135V to 3.465V ± 5%
    ️· Input Voltages:
    - VIL (Input Low Voltage): 0.8V
    - VIH (Input High Voltage): 2.0V
    ️· Output Voltages:
    - VOL (Output Low Voltage): 0.4V
    - VOH (Output High Voltage): 2.4V
    ️· Power Consumption:
    - Typical Idd (Operating Supply Current): 350 mA (at specified conditions)
    ️· Capacitance and Inductance: Specified values for input and output pins.

    5. Operating Conditions

    ️· Ambient Temperature: 0°C to +70°C (typical)
    ️· Storage Temperature: -65°C to +150°C

    6. Communication Protocols

    ️· I²C: The primary communication interface using address 0xD2.
    ️· Supports Block Read, Block Write and Byte-Data Read/Write protocols
    ️· Commands fill 8'h00 in Block mode

    7. Special Considerations

    ️· ESD Protection: Input ESD protection of 2000V (Human body model).
    ️· Unused Inputs: Must be tied to appropriate logic voltage levels (Ground or VDD).

    In Essence: The W83195CG-NP is a versatile chipset providing fine-grained control over power and clock management within a system, with detailed register access for configuration and monitoring. The device relies heavily on I²C communication, and understanding its register map is key to its operation.

    1. Overview and Functionality

    ️· Device: Winbond W83195CG-NP
    ️· Type: Power Management and System Monitoring Chipset
    ️· Interface: I²C Serial Bus (address 0xD2)
    ️· Purpose: Controls and monitors various system parameters related to power, clocks, and system health. Includes a set of registers for configuration and status retrieval.

    2. Clock Generation and Frequency Support

    ️· Supports CPU frequencies from 100 MHz to 400 MHz
    ️· PCI frequency support: 33.3 MHz
    ️· Offers flexibility to select CPU_ITP or SRCCLK output clocks.
    ️· Registers allow for stopping clocks (CPUCLK0_FS, CPUCLK1_FS, CPUCLK2_FS, PCIF_0, PCIF_1)

    3. Registers & Features (Key Summary - see full list in document)

    ️· Register 0 (Chip ID): Provides Winbond Chip ID.
    ️· Register 5: Includes `SEL_ITP` for selecting ITP or SRCCLK output, and `CPUCLK*_FS` registers for enabling stop features for CPU clocks.
    ️· Register 6: Contains `FSC_BACK`, `FSB_BACK`, and `FSA_BACK` - power-on latched values for various signals. Includes `PCI/SRCCLK_STOP` to disable PCI and SRCCLK outputs.
    ️· Register 7: Chip Identification Register, providing data for identification.
    ️· Offers "back" registers (FSA_BACK, FSB_BACK, FSC_BACK) for power-on latched signal values.
    ️· Registers for controlling clock stop features, essential for power saving and system management.

    4. Electrical Characteristics

    ️· Supply Voltage:
    - VDD = 3.135V to 3.465V ± 5%
    ️· Input Voltages:
    - VIL (Input Low Voltage): 0.8V
    - VIH (Input High Voltage): 2.0V
    ️· Output Voltages:
    - VOL (Output Low Voltage): 0.4V
    - VOH (Output High Voltage): 2.4V
    ️· Power Consumption:
    - Typical Idd (Operating Supply Current): 350 mA (at specified conditions)
    ️· Capacitance and Inductance: Specified values for input and output pins.

    5. Operating Conditions

    ️· Ambient Temperature: 0°C to +70°C (typical)
    ️· Storage Temperature: -65°C to +150°C

    6. Communication Protocols

    ️· I²C: The primary communication interface using address 0xD2.
    ️· Supports Block Read, Block Write and Byte-Data Read/Write protocols
    ️· Commands fill 8'h00 in Block mode

    7. Special Considerations

    ️· ESD Protection: Input ESD protection of 2000V (Human body model).
    ️· Unused Inputs: Must be tied to appropriate logic voltage levels (Ground or VDD).

    In Essence: The W83195CG-NP is a versatile chipset providing fine-grained control over power and clock management within a system, with detailed register access for configuration and monitoring. The device relies heavily on I²C communication, and understanding its register map is key to its operation.

    Part No.W83195CG-NP
    ManufacturerNUVOTON
    Size411 Kbytes
    Pages26 pages
    DescriptionWinbond Clock Generator W83195CG-NP For Intel Napa Platform
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