| Electronic Components Datasheet Search |
|
The question interval is too short.
Please try again in a few seconds.
Hello, Please ask a question about CDCM6100XEVM Datasheet
# Example questions:
➢ How does the typical rms jitter (trjit) generally change as the output frequency increases for lvpecl outputs?
➢ What are the recommended capacitor values and types for reg_cap1 and reg_cap2 according to the device information?
➢ If you are designing a system that requires a crystal oscillator with a frequency of 24 mhz, is this within the supported range specified in the 'crystal characteristics' section?
# CDCM61001 - Low-Jitter Clock Generator
## Features
️· Input: 21.875 MHz to 28.47 MHz crystal or LVCMOS
️· Output: Single LVPECL, LVDS, or LVCMOS output (selectable)
️· Frequency Range: 43.75 MHz to 683.264 MHz
️· Low Jitter: RMS phase jitter < 1 ps (typical)
️· Power Supply: 3.3V core and I/O
️· Package: 32-pin QFN
## Electrical Characteristics
️· Supply Voltage: 3.0V to 3.6V
️· Phase Noise: -81 dBc/Hz @ 100 Hz offset (625 MHz LVPECL)
️· RMS Phase Jitter: 0.509 ps (625 MHz LVPECL)
️· Output Duty Cycle: Corrected to 50% ± 5%
## Control & Programming
️· Output Divider: /1, /2, /3, /4, /6, /8 selectable via pins
️· Feedback Divider: 25 & 3, 24 & 3, 20 & 4, 15 & 5 selectable via pins
️· Output Type: LVPECL, LVDS, LVCMOS selectable via pins
️· Enable/Reset: Chip Enable and Reset pins provided
## Applications
️· Datacom (SONET, Ethernet, Fibre Channel)
️· High-Speed Serial Interfaces (Serial ATA)
️· HDTV
️· Cost-effective crystal oscillator replacement
# CDCM61001 - Low-Jitter Clock Generator
## Features
️· Input: 21.875 MHz to 28.47 MHz crystal or LVCMOS
️· Output: Single LVPECL, LVDS, or LVCMOS output (selectable)
️· Frequency Range: 43.75 MHz to 683.264 MHz
️· Low Jitter: RMS phase jitter < 1 ps (typical)
️· Power Supply: 3.3V core and I/O
️· Package: 32-pin QFN
## Electrical Characteristics
️· Supply Voltage: 3.0V to 3.6V
️· Phase Noise: -81 dBc/Hz @ 100 Hz offset (625 MHz LVPECL)
️· RMS Phase Jitter: 0.509 ps (625 MHz LVPECL)
️· Output Duty Cycle: Corrected to 50% ± 5%
## Control & Programming
️· Output Divider: /1, /2, /3, /4, /6, /8 selectable via pins
️· Feedback Divider: 25 & 3, 24 & 3, 20 & 4, 15 & 5 selectable via pins
️· Output Type: LVPECL, LVDS, LVCMOS selectable via pins
️· Enable/Reset: Chip Enable and Reset pins provided
## Applications
️· Datacom (SONET, Ethernet, Fibre Channel)
️· High-Speed Serial Interfaces (Serial ATA)
️· HDTV
️· Cost-effective crystal oscillator replacement
| Part No. | CDCM6100XEVM |
| Manufacturer | TI1 |
| Size | 735 Kbytes |
| Pages | 34 pages |
| Description | One Output, Integrated VCO, Low-Jitter Clock Generator |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |