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MAX1464 Datasheet(PDF) 18 Page - Maxim Integrated Products |
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MAX1464 Datasheet(HTML) 18 Page - Maxim Integrated Products |
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18 / 47 page  Low-Power, Low-Noise Multichannel Sensor Signal Processor 18 ______________________________________________________________________________________ Every function of the DOP module can be selected individ- ually (DAC, PWM, or op amp), or two out of the three func- tions of the DOP module can be selected at the same time (PWM and op amp, or DAC and PWM, or DAC and op amp), as there are only two output pins for the module, OUTnSM and OUTnLG. The various configuration options for the DOP are shown in Table 21. The PWRDAC and PWROP bits are in the power-on control register (address = 31h), and the remaining bits are in the DOP registers. See Tables 21 through 27. Timer Module The timer module (Figure 6) comprises a 12-bit counter, a 4-bit prescalar, and control and configuration registers. When the timer is enabled and initiated, the system master clock, MCLK, is prescaled by the divisor set by PS[3:0] in the TMR_Config register and the result applied to the 12- bit upcounter. When the counter value matches the time- out value TO[11:0] in register TMR_Config, bit TMDN is set to 1. The CPU can poll the timer done bit TMDN to check its status. The timer module provides a feature that enables the CPU to be put into a low-power halt mode for the duration of the timer interval. Setting the ENAHALT bit in the TMR_Control register while starting the timer (setting the timer enable bit TMEN to 1), or while the timer is already enabled and counting halts the CPU at the present instruction until the TMDN bit becomes set by the counter. The CPU com- mences execution with the next instruction. All CPU regis- ters and ports are fully static and retain all data during the elapsed time interval. The time interval between TMEN being set to 1, and TMDN being set to 1 can be computed as follows: Time Interval = (2 / fOSC) x {(prescale value N) x (timeout value TO[11:0]) + 1.5} The maximum time interval given fOSC = 4MHz clock is 786ms. Power Control The power to various subcircuits in the MAX1464 can be turned on and off by CPU control and by the serial inter- face. Unused subcircuits and modules can be turned off to reduce power consumption. The default state after power-on is all subcircuits and modules powered off. This enables low-power embedded systems to turn on only the needed modules after exiting a low-power CPU halt timer interval. Modules can be turned on and off as needed; however, care must be exercised to allow for module initialization and settling prior to use. Oscillator Control The MAX1464 has a fully integrated oscillator with a nominal 4MHz frequency. An external clock source can be used when the clock-select pin CKSEL = 0, operating all internal timing functions. CKIO can also be configured as an output source of the internal oscillator clock. GPIO Module The MAX1464 contains two general-purpose digital input/output (GPIO) modules, GPIO1 and GPIO2, which can be written and read by CPU control and by the ser- ial interface. These two I/O pins operate independently of each other. They can be configured as inputs, out- puts, or one input and one output. When configured as an input, there are two modes of sensing digital inputs; as a voltage or logic level, or as an edge detector. In edge-detector mode, either a rising or falling edge can be selected for detection. A bit is set in the GPIO con- trol register upon detection of the selected edge. The GPIO pins have nominal 100k Ω pulldown resistors to VSS as in Figure 6. Pulldown resistors provide a low logic level when the pin is unconnected. The GPIO may also serve as an input pin and its state is read from the GPIO control register (Tables 28 and 29). When using the GPIO pin as a general-purpose output, its output state is defined by writing to the GPIO control register. The GPIOn pins can be configured as an alert output that goes low or high whenever a fault condition hap- pens, e.g., remote sensor line disconnection, overflow conditions in the CPU program execution, etc. All input and output control for the GPIO1 and GPIO2 pins are contained in GPIO1_Control (address = 40h) and GPIO2_Control (address = 41h), respectively. Figure 7 shows the GPIO1 and GPIO2 modules. Serial Interface Timing and Operation The MAX1464 serial interface is a high-speed asyn- chronous data input and output communication port, providing access to internal registers for calibration of embedded control sensor systems. All the FLASH memory is read and write accessible by the serial inter- 20h TMR_Control 21h TMR_Config PRESCALER 12-BIT COUNTER TIMEOUT VALUE MCLK Figure 6. Timer Module |
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