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RA4M1 Datasheet(PDF) 113 Page - Renesas Technology Corp

Part # RA4M1
Description  High efficiency 48-MHz Arm Cortex-M4 core, 256-KB code flash memory
PDF  130 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

RA4M1 Datasheet(HTML) 113 Page - Renesas Technology Corp

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R01DS0355EJ0100 Rev.1.00
Page 113 of 130
Oct 8, 2019
RA4M1 Group
2. Electrical Characteristics
Note:
Does not include the time until each operation of the flash memory is started after instructions are executed by software.
Note:
The lower-limit frequency of FCLK is 1 MHz during programming or erasing the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note:
The frequency accuracy of FCLK must be ±3.5%. Confirm the frequency accuracy of the clock source.
2.15.2
Data Flash Memory Characteristics
Note 1.
The reprogram/erase cycle is the number of erasure for each block. When the reprogram/erase cycle is n times (n = 100,000),
erasing can be performed n times for each block. For instance, when 1-byte programming is performed 1,000 times for different
addresses in 1-byte blocks, and then the entire block is erased, the reprogram/erase cycle is counted as one. However,
programming the same address for several times as one erasure is not enabled. Overwriting is prohibited.
Note 2.
Characteristics when using the flash memory programmer and the self-programming library provided by Renesas Electronics.
Note 3.
These results are obtained from reliability testing.
Note:
Does not include the time until each operation of the flash memory is started after instructions are executed by software.
Note:
The lower-limit frequency of FCLK is 1 MHz during programming or erasing the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note:
The frequency accuracy of FCLK must be ±3.5%. Confirm the frequency accuracy of the clock source.
Table 2.71
Code flash characteristics (3)
Middle-speed operating mode
Conditions: VCC = 1.8 to 5.5 V, Ta = -40 to +85°C
Parameter
Symbol
FCLK = 1 MHz
FCLK = 8 MHz
Unit
Min
Typ
Max
Min
Typ
Max
Programming time
8-byte
tP8
-
157
1411
-
101
966
μs
Erasure time
2-KB
tE2K
-
9.10
289
-
6.10
228
ms
Blank check time
8-byte
tBC8
-
-
87.7
-
-
52.5
μs
2-KB
tBC2K
-
-
1930
-
-
414
μs
Erase suspended time
tSED
-
-
32.7
-
-
21.6
μs
Startup area switching setting time
tSAS
-
22.5
592
-
14.0
464
ms
Access window time
tAWS
-
22.5
592
-
14.0
464
ms
OCD/serial programmer ID setting time
tOSIS
-
22.5
592
-
14.0
464
ms
Flash memory mode transition wait time 1 tDIS
2
--2
--μs
Flash memory mode transition wait time 2 tMS
720
-
-
720
-
-
ns
Table 2.72
Data flash characteristics (1)
Parameter
Symbol
Min
Typ
Max
Unit
Test conditions
Reprogramming/erasure cycle*1
NDPEC
100,000
1,000,000
-
Times
-
Data hold time
After 10,000 times of NDPEC
tDDRP
20*2, *3
-
-
Year
Ta = +85°C
After 100,000 times of NDPEC
5*2, *3
-
-
Year
After 1,000,000 times of
NDPEC
-1*2, *3
-
Year
Ta = +25°C
Table 2.73
Data flash characteristics (2)
High-speed operating mode
Conditions: VCC = 2.7 to 5.5 V
Parameter
Symbol
FCLK = 4 MHz
FCLK = 32 MHz
Unit
Min
Typ
Max
Min
Typ
Max
Programming time
1-byte
tDP1
-
52.4
463
-
42.1
387
μs
Erasure time
1-KB
tDE1K
-
8.98
286
-
6.42
237
ms
Blank check time
1-byte
tDBC1
-
-
24.3
-
-
16.6
μs
1-KB
tDBC1K
-
-
1872
-
-
512
μs
Suspended time during erasing
tDSED
-
-
13.0
-
-
10.7
μs
Data flash STOP recovery time
tDSTOP
5-
-
5
-
-
μs



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