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STPMIC1APQR Datasheet(PDF) 113 Page - STMicroelectronics |
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STPMIC1APQR Datasheet(HTML) 113 Page - STMicroelectronics |
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113 / 140 page ![]() 6.6 NVM registers 6.6.1 NVM status register (NVM_SR) Table 62. NVM_SR 7 6 5 4 3 2 1 0 reserved reserved reserved reserved reserved reserved reserved NVM_BUSY R R R R R R R R Address: 0xB8 Type: read only register Default: 0x00 Description: NVM status register. [7 :1] reserved [0] NVM_BUSY: NVM controller status 0: NVM controller is in idle state 1: NVM controller is in busy state Self-cleared when the operation is completed STPMIC1 NVM registers DS12792 - Rev 7 page 113/140 |
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