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STPMIC1DPQR Datasheet(PDF) 119 Page - STMicroelectronics |
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STPMIC1DPQR Datasheet(HTML) 119 Page - STMicroelectronics |
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119 / 140 page ![]() 6.7.2 NVM BUCK rank shadow register (NVM_BUCKS_RANK_SHR) Table 66. NVM_BUCKS_RANK_SHR 7 6 5 4 3 2 1 0 BUCK4_RANK[1:0] BUCK3_RANK[1:0] BUCK2_RANK[1:0] BUCK1_RANK [1:0] R/W R/W R/W R/W R/W R/W R/W R/W Address: 0xF9 Type: read write register Default: Depends on part number refer to Table 64. NVM shadow register map Description: NVM buck rank shadow register. [7:6] BUCK4_RANK[1:0]: 00: rank0 01: rank1 10: rank2 11: rank3 [5:4] BUCK3_RANK[1:0]: 00: rank0 01: rank1 10: rank2 11: rank3 [3:2] BUCK2_RANK[1:0]: 00: rank0 01: rank1 10: rank2 11: rank3 [1:0] BUCK1_RANK[1:0]: 00: rank0 01: rank1 10: rank2 11: rank3 STPMIC1 NVM shadow registers DS12792 - Rev 7 page 119/140 |
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