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MAX1463 Datasheet(PDF) 28 Page - Maxim Integrated Products |
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MAX1463 Datasheet(HTML) 28 Page - Maxim Integrated Products |
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28 / 49 page  MLT Multiply Op-code: 1111 0011BINARY F3h Operation: A-register | M-register ← N-register x M-register PC-register ← PC + 1 (point to next instruction) CPU Cycles required: 16 cycles Description: Perform a 16-bit by 16-bit arithmetic multiplication of the M-register and the N-register producing a 32-bit result. The 32-bit result is stored in two 16-bit registers; the A-register receives the most significant word of the result and the M-register receives the least significant word of the result. The A-register must be cleared to zero (CLX A) before executing the MLT instruction. The previous contents of A-register are overwritten and lost. The previous contents of M-register are overwritten and lost. The contents of the N-register are not altered. The register op code must be 3h. PC is incremented once to point to the next instruction in program memory. Two’s complement data format is preserved. No branching occurs. No other registers are affected. Low-Power Two-Channel Sensor Signal Processor 28 ______________________________________________________________________________________ ADDRESS REF ALT NAME FUNCTION 0h R0 P Pointer Register. This register contains the address of the instruction or data in FLASH memory to be fetched. 1h R1 A Accumulator Register. This register generally contains the result of any operation involving two or more registers. It is the accumulator for the multiregister operation result and can be used effectively to carry data from one computation to the next. The A-register can read and write data to and from any other CPU port or register. 2h R2 — General-Purpose Register. This register is used to hold intermediate calculation results, calculation coefficients, loop counter values, event counter values, comparison limit values, etc. 3h R3 N Multiplicand Register. This register has a dedicated function when executing a multiply (MLT) instruction, but can be used as a general-purpose register otherwise. The contents of the N-register are not modified by the MLT instruction. 4h R4 M Multiplier Register. This register has a dedicated function when executing a multiply (MLT) instruction, but can be used as a general-purpose register otherwise. The contents of the M-register are modified by the MLT instruction. The data contents prior to the execution of the MLT instruction are overwritten with the LSBs resulting product, and hence lost. 5h R5 I Index Register. The branch not zero (BNX) and branch positive (BPX) instructions test the index register, I, for conditions to determine if branching should occur. If the index register tests true for the condition to branch, then the contents of register-X are added to the pointer register, therefore executing a branch in the program. 6h–Fh R6–RF — General-Purpose Registers. Used to hold intermediate calculation results, calculation coefficients, loop counter values, event counter values, comparison limit values, etc. Table 1. CPU Registers |
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