TMP86FS28DFG datasheet(120/272 Pages) TOSHIBA

120 / 272 page

Page 108

8. 16-Bit TimerCounter (TC10,TC11)

8.2 16-Bit TimerCounter 11

TMP86FS28DFG

8.2.3.6 Programmable Pulse Generate (PPG) Output Mode

In the programmable pulse generation (PPG) mode, an arbitrary duty pulse is generated by counting

performed in the internal clock. To start the timer, TC11CR<TC11S> specifies either the edge of the input

pulse to the TC11 pin or the command start. TC11CR<MPPG11> specifies whether a duty pulse is pro-

duced continuously or not (one-shot pulse).

• When TC11CR<MPPG11> is set to “0” (Continuous pulse generation)

When a match between the up-counter and the TC11DRB value is detected after the timer

starts, the level of the PPG pin is inverted and an INTTC11 interrupt request is generated. The

up-counter continues counting. When a match between the up-counter and the TC11DRA value

is detected, the level of the PPG pin is inverted and an INTTC11 interrupt request is generated.

The up-counter is cleared at this time, and then continues counting and pulse generation.

When TC11S is cleared to “00” during PPG output, the PPG pin retains the level immediately

before the counter stops.

• When TC11CR<MPPG11> is set to “1” (One-shot pulse generation)

When a match between the up-counter and the TC11DRB value is detected after the timer

starts, the level of the PPG pin is inverted and an INTTC11 interrupt request is generated. The

up-counter continues counting. When a match between the up-counter and the TC11DRA value

is detected, the level of the PPG pin is inverted and an INTTC11 interrupt request is generated.

TC11CR<TC11S> is cleared to “00” automatically at this time, and the timer stops. The pulse

generated by PPG retains the same level as that when the timer stops.

Since the output level of the PPG pin can be set with TC11CR<TFF11> when the timer starts, a positive

or negative pulse can be generated. Since the inverted level of the timer F/F1 output level is output to the

PPG

pin, specify TC11CR<TFF11> to “0” to set the high level to the PPG pin, and “1” to set the low level

to the PPG pin. Upon reset, the timer F/F1 is initialized to “0”.

Note 1: To change TC11DRA or TC11DRB during a run of the timer, set a value sufficiently larger than the

count value of the counter. Setting a value smaller than the count value of the counter during a run of

the timer may generate a pulse different from that specified.

Note 2: Do not change TC11CR<TFF11> during a run of the timer. TC11CR<TFF11> can be set correctly only

at initialization (after reset). When the timer stops during PPG, TC11CR<TFF11> can not be set cor-

rectly from this point onward if the PPG output has the level which is inverted of the level when the

timer starts. (Setting TC11CR<TFF11> specifies the timer F/F1 to the level inverted of the pro-

grammed value.) Therefore, the timer F/F1 needs to be initialized to ensure an arbitrary level of the

PPG output. To initialize the timer F/F1, change TC11CR<TC11M> to the timer mode (it is not

required to start the timer mode), and then set the PPG mode. Set TC11CR<TFF11> at this time.

Note 3: In the PPG mode, the following relationship must be satisfied.

TC11DRA > TC11DRB

Note 4: Set TC11DRB after changing the mode of TC11M to the PPG mode.

TMP86FS28DFG Datasheet(PDF) 120 Page - Toshiba Semiconductor

TMP86FS28DFG Datasheet(HTML) 120 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL