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STM32F412RGH7TR Datasheet(PDF) 155 Page - STMicroelectronics

Part # STM32F412RGH7TR
Description  Arm®-Cortex®-M4 32b MCUFPU, 125 DMIPS, 1MB Flash, 256KB RAM, USB OTG FS, 17 TIMs, 1 ADC, 17 comm. interfaces
PDF  201 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F412RGH7TR Datasheet(HTML) 155 Page - STMicroelectronics

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DocID028087 Rev 7
155/201
STM32F412xE/G
Electrical characteristics
166
Table 88. Asynchronous multiplexed PSRAM/NOR read timings(1)(2)
1. CL = 30 pF.
2. Based on characterization, not tested in production.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
3THCLK – 1 3THCLK + 0.5
ns
tv(NOE_NE)
FSMC_NEx low to FSMC_NOE low
2THCLK
2THCLK + 1
ttw(NOE)
FSMC_NOE low time
THCLK – 1.5
THCLK
th(NE_NOE)
FSMC_NOE high to FSMC_NE high hold
time
0
-
tv(A_NE)
FSMC_NEx low to FSMC_A valid
-
0.5
tv(NADV_NE)
FSMC_NEx low to FSMC_NADV low
0
1
tw(NADV)
FSMC_NADV low time
THCLK – 0.5
THCLK + 0.5
th(AD_NADV)
FSMC_AD(address) valid hold time after
FSMC_NADV high)
0
-
th(A_NOE)
Address hold time after FSMC_NOE high
THCLK – 0.5
-
th(BL_NOE)
FSMC_BL time after FSMC_NOE high
0
-
tv(BL_NE)
FSMC_NEx low to FSMC_BL valid
-
0.5
tsu(Data_NE)
Data to FSMC_NEx high setup time
THCLK - 2
-
tsu(Data_NOE)
Data to FSMC_NOE high setup time
THCLK - 2
-
th(Data_NE)
Data hold time after FSMC_NEx high
0
-
th(Data_NOE)
Data hold time after FSMC_NOE high
0
-
Table 89. Asynchronous multiplexed PSRAM/NOR read-NWAIT timings(1)(2)
1. CL = 30 pF.
2. Based on characterization, not tested in production.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
8THCLK - 1
8THCLK + 0.5
ns
tw(NOE)
FSMC_NWE low time
5THCLK
5THCLK + 0.5
tsu(NWAIT_NE)
FSMC_NWAIT valid before FSMC_NEx
high
5THCLK - 1
-
th(NE_NWAIT)
FSMC_NEx hold time after
FSMC_NWAIT invalid
4THCLK + 1
-



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