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STM32F412RGT7TR Datasheet(PDF) 152 Page - STMicroelectronics

Part # STM32F412RGT7TR
Description  Arm®-Cortex®-M4 32b MCUFPU, 125 DMIPS, 1MB Flash, 256KB RAM, USB OTG FS, 17 TIMs, 1 ADC, 17 comm. interfaces
PDF  201 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F412RGT7TR Datasheet(HTML) 152 Page - STMicroelectronics

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Electrical characteristics
STM32F412xE/G
152/201
DocID028087 Rev 7
Table 84. Asynchronous non-multiplexed SRAM/PSRAM/NOR -
read timings(1)(2)
1. CL = 30 pF.
2. Based on characterization, not tested in production.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
2THCLK – 1
2 THCLK + 0.5
ns
tv(NOE_NE)
FSMC_NEx low to FSMC_NOE low
0
1
tw(NOE)
FSMC_NOE low time
2THCLK - 1.5
2THCLK
th(NE_NOE)
FSMC_NOE high to FSMC_NE high hold
time
0-
tv(A_NE)
FSMC_NEx low to FSMC_A valid
-
1.5
th(A_NOE)
Address hold time after FSMC_NOE high
0
-
tv(BL_NE)
FSMC_NEx low to FSMC_BL valid
-
0.5
th(BL_NOE)
FSMC_BL hold time after FSMC_NOE high
0
-
tsu(Data_NE)
Data to FSMC_NEx high setup time
THCLK - 1
-
tsu(Data_NOE)
Data to FSMC_NOEx high setup time
THCLK - 1
-
th(Data_NOE)
Data hold time after FSMC_NOE high
0
-
th(Data_NE)
Data hold time after FSMC_NEx high
0
-
tv(NADV_NE)
FSMC_NEx low to FSMC_NADV low
-
0
tw(NADV)
FSMC_NADV low time
-
THCLK + 0.5
Table 85. Asynchronous non-multiplexed SRAM/PSRAM/NOR read -
NWAIT timings(1)(2)
1. CL = 30 pF.
2. Based on characterization, not tested in production.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
7THCLK - 1 7THCLK + 0.5
ns
tw(NOE)
FSMC_NWE low time
5THCLK – 1.5
5THCLK
tw(NWAIT)
FSMC_NWAIT low time
THCLK – 0.5
-
tsu(NWAIT_NE)
FSMC_NWAIT valid before FSMC_NEx
high
5THCLK -1
-
th(NE_NWAIT)
FSMC_NEx hold time after FSMC_NWAIT
invalid
4THCLK + 1
-



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