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STM32F412RGH6 Datasheet(PDF) 133 Page - STMicroelectronics

Part # STM32F412RGH6
Description  Arm®-Cortex®-M4 32b MCUFPU, 125 DMIPS, 1MB Flash, 256KB RAM, USB OTG FS, 17 TIMs, 1 ADC, 17 comm. interfaces
PDF  201 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F412RGH6 Datasheet(HTML) 133 Page - STMicroelectronics

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DocID028087 Rev 7
133/201
STM32F412xE/G
Electrical characteristics
166
SPI interface characteristics
Unless otherwise specified, the parameters given in Table 65 for the SPI interface are
derived from tests performed under the ambient temperature, fPCLKx frequency and VDD
supply voltage conditions summarized in Table 16, with the following configuration:
Output speed is set to OSPEEDRy[1:0] = 10
Capacitive load C = 30 pF
Measurement points are done at CMOS levels: 0.5VDD
Refer to Section 6.3.16: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS, SCK, MOSI, MISO for SPI).
Table 65. SPI dynamic characteristics(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master full duplex/receiver mode,
2.7 V < VDD < 3.6 V
SPI1/4/5
--
50
MHz
Master transmitter mode
1.7 V < VDD < 3.6 V
SPI1/4/5
--
50
Master mode
1.7 V < VDD < 3.6 V
SPI1/2/3/4/5
--
25
Slave transmitter/full duplex mode
2.7 V < VDD < 3.6 V
SPI1//4/5
--
50
Slave transmitter/full duplex mode
1.7 V < VDD < 3.6 V
SPI1/4/5
--
35(2)
Slave receiver mode,
1.7 V < VDD < 3.6 V
SPI1/4/5
--
50
Slave mode,
1.7 V < VDD < 3.6 V
SPI2/3
--
25
Duty(SCK)
Duty cycle of SPI clock
frequency
Slave mode
30
50
70
%
tw(SCKH)
tw(SCKL)
SCK high and low time Master mode, SPI presc = 2
TPCLK−1.5
TPCLK
TPCLK
+1.5
ns
tsu(NSS)
NSS setup time
Slave mode, SPI presc = 2
3TPCLK
--
ns
th(NSS)
NSS hold time
Slave mode, SPI presc = 2
2TPCLK
--
ns
tsu(MI)
Data input setup time
Master mode
4.5
-
-
ns
tsu(SI)
Slave mode
1.5
-
-
ns
th(MI)
Data input hold time
Master mode
5
-
-
ns
th(SI)
Slave mode
0.5
-
-
ns



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