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ADE7166 Datasheet(PDF) 118 Page - Analog Devices

Part # ADE7166
Description  Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
PDF  144 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADE7166 Datasheet(HTML) 118 Page - Analog Devices

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ADE7566/ADE7569/ADE7166/ADE7169
Rev. A | Page 118 of 144
Table 125. Alarm Interval SFR (INTVAL, 0xA6)
Bit
Mnemonic
Default
Description
7 to 0
INTVAL
0
The interval timer counts according to the time base established in the ITS[1:0] bits of the RTC Configuration
SFR (TIMECON, 0xA1). Once the number of counts is equal to INTVAL, the ALARM flag is set and a
pending RTC interrupt is created. Note that the interval counter is eight bits. Therefore, it can count up to
255 seconds, for example.
Table 126. RTC Nominal Compensation SFR (RTCCOMP, 0xF6)
Bit
Mnemonic
Default
Description
7 to 0
RTCCOMP
0
The RTCCOMP SFR holds the nominal RTC compensation value at 25°C. This register is retained during
a watchdog reset or an external reset. It is reset after a POR.
Table 127. RTC Temperature Compensation SFR (TEMPCAL, 0xF7)
Bit
Mnemonic
Default
Description
7 to 0
TEMPCAL
0
The TEMPCAL SFR is adjusted based on the temperature read in the TEMPADC to calibrate the RTC over
temperature. This allows the external crystal shift to be compensated over temperature. This register is
retained during a watchdog reset or an external reset. It is reset after a POR.
Table 128. Interrupt Pins Configuration SFR (INTPR, 0xFF)
Bit
Mnemonic
Default
Description
7
RTCCAL
0
Controls the RTC calibration output. When set, the RTC calibration frequency selected by FSEL[1:0] is
output on the P0.2/CF1/RTCCAL pin.
Sets RTC calibration output frequency and calibration window.
FSEL[1:0]
Result (Calibration Window, Frequency)
0
0
30.5 sec, 1 Hz
0
1
30.5 sec, 512 Hz
1
0
0.244 sec, 500 Hz
6 to 5
FSEL[1:0]
1
1
0.244 sec, 16.384 kHz
4
Reserved
Controls the function of INT1.
INT1PRG[2:0]
Result
x
0
0
GPIO
x
0
1
BCTRL
0
1
x
INT1 input disabled
3 to 1
INT1PRG[2:0]
000
1
1
x
INT1 input enabled
Controls the function of INT0.
INT0PRG
Result
0
INT0 input disabled
0
INT0PRG
0
1
INT0 input enabled
Table 129. Key SFR (KYREG, 0xC1)
Bit
Mnemonic
Default
Description
7 to 0
KYREG
0
Write 0xA7 to the this SFR before writing to the POWCON SFR, which unlocks KYREG.
Write 0xEA to the this SFR before writing to the INTPR, HTHSEC, SEC, MIN, or HOUR timekeeping
registers to unlock KYREG.



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