ST7265X datasheet(131/166 Pages) STMICROELECTRONICS

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ST7265x

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OPERATING CONDITIONS (Cont’d)

13.3.2 Operating Conditions with Low Voltage Detector (LVD)

Subject to general operating conditions for VDD, fOSC, and TA.

Notes:

1. LVD typical data are based on TA=25°C. They are given only as design guidelines and are not tested.

2. Not tested, guaranteed by construction.

3. The VDD rise time condition is needed to insure a correct device power-on and LVD reset. Not tested in production.

13.3.3 Power Supply Manager Characteristics

Subject to general operating conditions for VDD, fOSC, and TA. Not guaranteed on LVD devices (without E

suffix).

1. Not tested, guaranteed by construction.

13.3.4 Storage Device Supply Characteristics

Subject to general operating conditions for VDD, fOSC, and TA.

Note: In Stand-alone mode VDDF must be connected to VDD

Symbol

Parameter

Conditions

Min

Typ 1)

Max

Unit

VIT+

Reset release threshold

(VDD rise)

2.9

3.5

3.8

VIT-

Reset generation threshold

(VDD fall)

2.6

3.1

3.5

Vhys

LVD voltage threshold hysteresis

VIT+-VIT-

150

300

fCUTOFF

LVD filter cut-off frequency 2)

Not detected by the LVD

MHz.

VtPOR

VDD rise time

0.3

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

USBVIT+

Reset release threshold

(VDD rise)

3.50

3.80

4.00

USBVIT-

Reset generation threshold

(VDD fall)

3.30

3.65

3.80

USBVhys

USB voltage threshold hysteresis

USBVIT+-USBVIT-

100

200

300

VPLLmin48

Minimum voltage required for stable

48MHz PLL operation (PLL locked)

3.7 1)

VPLLmin40

Minimum voltage required for

40MHz PLL operation (PLL un-

locked)

3.4 1)

VPLLmin24

Minimum voltage required for

24MHz PLL operation (PLL un-

locked)

3.0 1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDDF

Voltage output for external storage

device (Iload max = 50mA)

USB Mode: VSET[1:0]=11

2.5

2.8

3.2

2.9

3.3

3.6

3.0

3.4

3.8

3.1

3.5

3.9

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