M32CSLASH8A datasheet(105/372 Pages) RENESAS

105 / 372 page

M32C/8A Group

9. Clock Generation Circuits

Rev.1.00

Jul 15, 2007

Page 88 of 352

REJ09B0385-0100

Figure 9.14

Procedure to Enter Wait Mode

Set an interrupt priority level of each interrupt

RLVL register: bits RLVL2 to RLVL0 = 7

Set the interrupt priority level (ILVL2 to ILVL0) of

the interrupt used to exit wait mode

I flag = 0

(1) Initial setting

Set the interrupt priority level of the interrupts,

which are not used to exit wait mode, to 0

FLG register: set IPL

Bits RLVL2 to RLVL0 = the same level as IPL

Select the operating mode from the following:

-main clock mode

-low-speed mode

-on-chip oscillator mode

-on-chip oscillator low-power consumption mode

I flag = 1

Execute the WAIT instruction

(2) Before entering wait mode

Wait mode

RLVL register: bits RLVL2 to RLVL0 = 7

(3) After exiting wait mode

> IPL* = (RLVL2 to RLVL0)*

Start

End

Initial setting for the wait/stop mode

exit interrupt priority level

Interrupt disabled

(ILVL2 to ILVL0)

Set the processor interrupt priority level (IPL)*

Set the exit interrupt priority level (RLVL2 to RLVL0)*

Interrupt enabled

Set the exit priority level as soon as exiting wait mode

(note) Insert at least 4 NOP's after WAIT instruction.

When the CM02 bit in the CM0 register is 1,

set bits MCD4 to MCD0 in the MCD register

for the CPU frequency to be 10 MHz or less.

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