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H8S2245 Datasheet(PDF) 131 Page - Renesas Technology Corp |
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H8S2245 Datasheet(HTML) 131 Page - Renesas Technology Corp |
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131 / 818 page ![]() Section 3 MCU Operating Modes Rev.3.00 Mar. 26, 2007 Page 89 of 772 REJ09B0355-0300 Mode 1 (normal expanded mode with on-chip ROM disabled) Mode 2 (normal expanded mode with on-chip ROM enabled) Mode 3 (normal single-chip mode) External address space On-chip ROM On-chip RAM* Reserved area* Reserved area* Reserved area Note: * External addresses can be accessed by clearing the RAME bit in SYSCR to 0. Internal I/O registers On-chip ROM External address space External address space On-chip RAM* On-chip RAM Internal I/O registers Internal I/O registers Internal I/O registers Internal I/O registers External address space External address space Internal I/O registers External address space H'0000 H'0000 H'0000 H'E400 H'DFFF H'E000 H'7FFF H'7FFF H'8000 H'EC00 H'E400 H'FBFF H'FC00 H'FFFF H'EC00 H'FBFF H'FC00 H'FFFF H'EC00 H'FBFF H'FFFF H'FE3F H'FF08 H'FE3F H'FF08 H'FE40 H'FF07 H'FF28 H'FF28 H'FF28 Figure 3.6 H8S/2241 Memory Map in Each Operating Mode |
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