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HD64F2149YV Datasheet(PDF) 1048 Page - Renesas Technology Corp |
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HD64F2149YV Datasheet(HTML) 1048 Page - Renesas Technology Corp |
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1048 / 1075 page ![]() Appendix C I/O Port Block Diagrams Rev. 3.00 Jan 18, 2006 page 1020 of 1044 REJ09B0280-0300 D R QD P81DR C Reset R Q P81DDR C Reset WP8D Mode 2, 3 EXPE CS2E HI12E WP8 HIF : XBS CS2 input HIF : LPC GA20 input HIF : XBS GA20 output Output enable HIF : LPC GA20 output Output enable P81 RP8 Legend: WP8D WP8 RP8 : Write to P8DDR : Write to port 8 : Read port 8 *1 *2 Notes: 1. Output enable signal 2. Open drain control signal Hardware standby Figure C.26 Port 8 Block Diagram (Pin P81) |
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