H8SXSLASH1663R datasheet(936/1504 Pages) RENESAS

936 / 1504 page

Section 19 Serial Communication Interface (SCI, IrDA, CRC)

Rev. 2.00 Sep. 24, 2008 Page 904 of 1468

REJ09B0412-0200

19.3.11

Serial Extended Mode Register 5 and 6 (SEMR_5 and SEMR_6)

SEMR_5 and SEMR_6 select the clock source in asynchronous mode of SCI_5 and SCI_6. The

base clock is automatically specified when the average transfer rate operation is selected. TMQ

output in TMR unit 2 and unit 3 can also be set as the serial transfer base clock. Figure 19.3

describes the examples of base clock features when the average transfer rate operation is selected.

Figure 19.4 describes the examples of base clock features when the TMO output in TMR is

selected.



Undefined



Undefined



Undefined

ABCS

R/W

Bit

Bit Name

Initial Value

R/W

ACS3

R/W

ACS2

R/W

ACS1

R/W

ACS0

R/W

Bit

Bit Name

Initial

Value

R/W

Description

7 to 5



Undefined

Reserved

These bits are always read as undefined and cannot be

modified.

ABCS

R/W

Asynchronous Mode Base Clock Select (valid only in

asynchronous mode)

Selects the base clock for a 1-bit period.

0: The base clock has a frequency 16 times the transfer

rate

1: The base clock has a frequency 8 times the transfer

rate

ACS3

ACS2

ACS1

ACS0

R/W

Asynchronous Mode Clock Source Select

These bits select the clock source for the average

transfer rate function in the asynchronous mode. When

the average transfer rate function is enabled, the base

clock is automatically specified regardless of the ABCS

bit value. The average transfer rate only corresponds to

8MHz, 10.667MHz, 12MHz, 16MHz, 24MHz, and

32MHz. No other clock is available. Setting of ACS3 to

ACS0 must be done in the asynchronous mode (the

A bit in SMR = 0) and the external clock input mode

(the CKE bit I SCR

= 1). The setting examples are in

figures 19.3 and 19.4.

(Each number in the four-digit number below

corresponds to the value in the bits ACS3 to ACS0 from

left to right respectively.)

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