H8SXSLASH1663R datasheet(1033/1504 Pages) RENESAS

1033 / 1504 page

Section 20 USB Function Module (USB)

Rev. 2.00 Sep. 24, 2008 Page 1001 of 1468

REJ09B0412-0200

Bit

Transfer

Mode

Interrupt

Source

Description

Interrupt

Request

Signal

DTC

Activation

DMAC

Activation

SETI

Set_Interface

command detection

USBINTN2 or

USBINTN3

Status

SETC

Set_Configuration

command detection

USBINTN2 or

USBINTN3

—

Reserved



—

IFR2

CFDN

Endpoint information

load end

USBINTN2 or

USBINTN3

Status

SURSF

Suspend/resume

detection

USBINTN2,

USBINTN3, or

RESUME

SURSS

Suspend/resume

status

—

Reserved

—

Note:

EP0 interrupts must be assigned to the same interrupt request signal.

• USBINTN0 signal

DMAC start interrupt signal only EP1. See section 20.8, DMA Transfer.

• USBINTN1 signal

DMAC start interrupt signal only EP2. See section 20.8, DMA Transfer.

• USBINTN2 signal

The USBINTN2 signal requests interrupt sources for which the corresponding bits in interrupt

select registers 0 to 2 (ISR0 to ISR2) are cleared to 0. The USBINTN2 is driven low if a

corresponding bit in the interrupt flag register is set to 1.

• USBINTN3 signal

The USBINTN3 signal requests interrupt sources for which the corresponding bits in interrupt

select registers 0 to 2 (ISR0 to ISR2) are cleared to 0. The USBINTN3 is driven low if a

corresponding bit in the interrupt flag register is set to 1.

• RESUME signal

The RESUME signal is a resume interrupt signal for canceling software standby mode and

deep software standby mode. The RESUME signal is driven low at the transition to the resume

state for canceling software standby mode and deep software standby mode.

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