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H8SX/1663R Datasheet(PDF) 1235 Page - Renesas Technology Corp

Part # H8SX/1663R
Description  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663R Datasheet(HTML) 1235 Page - Renesas Technology Corp

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Section 25 Flash Memory
Rev. 2.00 Sep. 24, 2008 Page 1203 of 1468
REJ09B0412-0200
25.14
Usage Notes
1. The initial state of the product at its shipment is in the erased state. For the product whose
revision of erasing is undefined, we recommend to execute automatic erasure for checking the
initial state (erased state) and compensating.
2. For the PROM programmer suitable for programmer mode in this LSI and its program version,
refer to the instruction manual of the socket adapter.
3. If the socket, socket adapter, or product index of the PROM programmer do not match the
specifications, too much current flows and the product may be damaged.
4. Use a PROM programmer that supports the device with 1-Mbyte on-chip flash memory and
3.3-V programming voltage. Use only the specified socket adapter.
5. Do not turn off the Vcc power supply nor remove the chip from the PROM programmer during
programming/erasure in which a high voltage is applied to the flash memory. Doing so may
damage the flash memory permanently. If a reset is input, the reset must be released after the
reset input period of at least 100ms.
6. The flash memory is not accessible until FKEY is cleared after programming/erasure starts. If
the operating mode is changed and this LSI is restarted by a reset immediately after
programming/erasure has finished, secure the reset input period (period of
RES = 0) of at least
100
µs. Transition to the reset state during programming/erasure is inhibited. If a reset is input
accidentally, the reset must be released after the reset input period of at least 100
µs.
7. At powering on or off the Vcc power supply, fix the
RES pin to low and set the flash memory
to hardware protection state. This power on/off timing must also be satisfied at a power-off and
power-on caused by a power failure and other factors.
8. In on-board programming mode or programmer mode, programming of the 128-byte
programming-unit block must be performed only once. Perform programming in the state
where the programming-unit block is fully erased.
9. When the chip is to be reprogrammed with the programmer after execution of programming or
erasure in on-board programming mode, it is recommended that automatic programming is
performed after execution of automatic erasure.
10. To program the flash memory, the program data and program must be allocated to addresses
which are higher than those of the external interrupt vector table and H'FF must be written to
all the system reserved areas in the exception handling vector table.
11. The programming program that includes the initialization routine and the erasing program that
includes the initialization routine are each 4 Kbytes or less. Accordingly, when the CPU clock
frequency is 35 MHz, the download for each program takes approximately 60
µs at the
maximum.



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