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H8SX/1663M Datasheet(PDF) 646 Page - Renesas Technology Corp |
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H8SX/1663M Datasheet(HTML) 646 Page - Renesas Technology Corp |
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646 / 1504 page  Section 13 I/O Ports Rev. 2.00 Sep. 24, 2008 Page 614 of 1468 REJ09B0412-0200 13.2.2 Port 2 (1) P27/PO7/TIOCA5/TIOCB5 The pin function is switched as shown below according to the combination of the TPU and PPG register settings and P27DDR bit setting. Setting TPU PPG I/O Port Module Name Pin Function TIOCB5_OE PO7_OE P27DDR TPU TIOCB5 output 1 — — PPG PO7 output 0 1 — P27 output 0 0 1 I/O port P27 input (initial value) 0 0 0 (2) P26/PO6/TIOCA5/TMO1/TxD1 The pin function is switched as shown below according to the combination of the TPU, TMR, SCI, and PPG register settings and P26DDR bit setting. Setting TPU TMR SCI PPG I/O Port Module Name Pin Function TIOCA5_OE TMO1_OE TxD1_OE PO6_OE P26DDR TPU TIOCA5 output 1 TMR TMO1 output 0 1 SCI TxD1 output 0 0 1 PPG PO6 output 0 0 0 1 P26 output 0 0 0 0 1 I/O port P26 input (initial value) 0 0 0 0 0 |
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