H8SXSLASH1663M datasheet(878/1504 Pages) RENESAS

878 / 1504 page

Section 17 32K Timer (TM32K)

Rev. 2.00 Sep. 24, 2008 Page 846 of 1468

REJ09B0412-0200

17.2

The TM32K has the following registers.

• Timer control register (TCR32K)

• Timer counter (TCNT32K1, TCNT32K2, TCNT32K3)

17.2.1

Timer Control Register (TCR32K)

TCR32K enables the timer, stops the subclock oscillator, and selects the clock source to be input

to TCNT32K. Change values of the bits when TME=0.

Bit

BIt Name

Initial Value

R/W

EXCKSN

R/W



TME

R/W



OSC32STP

R/W

CKS1

R/W

CKS0

R/W

Bit

Bit Name

Initial

Value

R/W

Description

EXCKSN

CKS1

CKS0

R/W

Extended Clock Select and Clock Select 1, 0

These bits select the internally divided clock source to be

input to TCNT32K. The interrupt cycle for SUBCK =

32.768 kHz is indicated in parentheses.

When EXCKSN = 1:

00: Clock SUBCK/32 (cycle: 250 ms)

01: Clock SUBCK/64 (cycle: 500 ms)

10: Clock SUBCK/128 (cycle: 1 s)

11: Clock SUBCK/256 (cycle: 2 s)

When EXCKSN = 0:

00: Clock SUBCK/16384 (cycle: 30 s)

01: Clock SUBCK/32768 (cycle: 60 s)

10: Clock SUBCK/16384 (cycle: approx. 22.7 days)

11: Clock SUBCK/32768 (cycle: approx. 45.5 days)



Reserved

This bit is always read as 1 and cannot be modified.

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