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M32C/86 Datasheet(PDF) 273 Page - Renesas Technology Corp |
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M32C/86 Datasheet(HTML) 273 Page - Renesas Technology Corp |
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273 / 505 page ![]() Page 250 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 18. A/D Converter ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M 18.2 Functions 18.2.1 Resolution Select Function The BITS bit in the AD0CON1 register determines the resolution. When the BITS bit is set to "1" (10-bit precision), the A/D conversion result is stored into bits 9 to 0 in the AD0j register (j = 0 to 7). When the BITS bit is set to "0" (8-bit precision), the A/D conversion result is stored into bits 7 to 0 in the AD0j register. 18.2.2 Sample and Hold Function When the SMP bit in the AD0CON2 register is set to "1" (with the sample and hold function), A/D conver- sion rate per pin increases to 28 ØAD cycles for 8-bit resolution and 33 ØAD cycles for 10-bit resolution. The sample and hold function is available in all operating modes. Start the A/D conversion after selecting whether the sample and hold function is to be used or not. 18.2.3 Trigger Select Function The TRG bit in the AD0CON0 register and the TRG0 bit in the AD0CON2 register select the trigger to start the A/D conversion. Table 18.9 lists settings of the trigger select function. Table 18.9 Trigger Select Function Settings Bit and Setting Trigger AD0CON0 Register AD0CON2 Register TRG = 0 - Software trigger The A/D0 starts the A/D conversion when the ADST bit in the AD0CON0 register is set to "1" TRG = 1(1) TRG0 = 0 External trigger(2) __________ Falling edge of a signal applied to ADTRG TRG0 = 1 Hardware trigger(2) The timer B2 interrupt request of three-phase motor control timer functions (after the ICTB2 counter completes counting) NOTES: 1. A/D0 starts the A/D conversion when the ADST bit is set to "1" (A/D conversion started) and a trigger is generated. 2. The A/D conversion is restarted if an external trigger or a hardware trigger is inserted during the A/D conversion. (The A/D conversion in process is aborted.) 18.2.4 DMAC Operating Mode DMAC operating mode is available with all operating modes. When the A/D converter is in multi-port single sweep mode or multi-port repeat sweep mode 0, the DMAC operating mode must be used. When the DUS bit in the AD0CON3 register is set to "1" (DMAC operating mode enabled), all A/D conversion results are stored into the AD00 register. DMAC transfers data from the AD00 register to any memory space every time an A/D conversion is completed in each pin. 8-bit DMA transfer must be selected for 8- bit resolution and 16-bit DMA transfer for 10-bit resolution. Refer to 13. DMAC for instructions. |
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