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LCMXO2-640ZE-2TG100C Datasheet(PDF) 104 Page - Lattice Semiconductor |
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LCMXO2-640ZE-2TG100C Datasheet(HTML) 104 Page - Lattice Semiconductor |
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104 / 106 page  January 2013 Data Sheet DS1035 © 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. www.latticesemi.com 7-1 DS1035 Revision History Date Version Section Change Summary November 2010 01.0 — Initial release. January 2011 01.1 All Included ultra-high I/O devices. DC and Switching Characteristics Recommended Operating Conditions table – Added footnote 3. DC Electrical Characteristics table – Updated data for IIL, IIH. VHYST typ- ical values updated. Generic DDRX2 Outputs with Clock and Data Aligned at Pin (GDDRX2_TX.ECLK.Aligned) Using PCLK Pin for Clock Input tables – Updated data for TDIA and TDIB. Generic DDRX4 Outputs with Clock and Data Aligned at Pin (GDDRX4_TX.ECLK.Aligned) Using PCLK Pin for Clock Input tables – Updated data for TDIA and TDIB. Power-On-Reset Voltage Levels table - clarified note 3. Clarified VCCIO related recommended operating conditions specifica- tions. Added power supply ramp rate requirements. Added Power Supply Ramp Rates table. Updated Programming/Erase Specifications table. Removed references to VCCP. Pinout Information Included number of 7:1 and 8:1 gearboxes (input and output) in the pin information summary tables. Removed references to VCCP. April 2011 01.2 — Data sheet status changed from Advance to Preliminary. Introduction Updated MachXO2 Family Selection Guide table. Architecture Updated Supported Input Standards table. Updated sysMEM Memory Primitives diagram. Added differential SSTL and HSTL IO standards. DC and Switching Characteristics Updates following parameters: POR voltage levels, DC electrical char- acteristics, static supply current for ZE/HE/HC devices, static power consumption contribution of different components – ZE devices, pro- gramming and erase Flash supply current. Added VREF specifications to sysIO recommended operating condi- tions. Updating timing information based on characterization. Added differential SSTL and HSTL IO standards. Ordering Information Added Ordering Part Numbers for R1 devices, and devices in WLCSP packages. Added R1 device specifications. May 2011 01.3 Multiple Replaced “SED” with “SRAM CRC Error Detection” throughout the doc- ument. DC and Switching Characteristics Added footnote 1 to Program Erase Specifications table. Pinout Information Updated Pin Information Summary tables. Signal name SO/SISPISO changed to SO/SPISO in the Signal Descrip- tions table. MachXO2 Family Data Sheet Revision History |
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