STM32F103RCT7 datasheet(125/130 Pages) STMICROELECTRONICS

125 / 130 page

STM32F103xC, STM32F103xD, STM32F103xE

Revision history

Doc ID 14611 Rev 8

125/130

21-Jul-2008

Document status promoted from Preliminary Data to full datasheet.

FSMC (flexible static memory controller) on page 15 modified.

Number of complementary channels corrected in Figure 1:

STM32F103xC, STM32F103xD and STM32F103xE performance line

block diagram.

Power supply supervisor on page 17 modified and VDDA added to

Table 10: General operating conditions on page 42.

Table notes revised in Section 5: Electrical characteristics.

Capacitance modified in Figure 12: Power supply scheme on page 40.

Table 52: SCL frequency (fPCLK1= 36 MHz.,VDD = 3.3 V) updated.

Table 53: SPI characteristics modified, th(NSS) modified in Figure 49:

SPI timing diagram - slave mode and CPHA = 0 on page 96.

Minimum SDA and SCL fall time value for Fast mode removed from

Table 51: I2C characteristics on page 93, note 1 modified.

IDD_VBAT values and some IDD values with regulator in run mode added

to Table 17: Typical and maximum current consumptions in Stop and

Standby modes on page 48.

Table 30: Flash memory endurance and data retention on page 63

updated.

tsu(NSS) modified in Table 53: SPI characteristics on page 95.

EO corrected in Table 62: ADC accuracy on page 105. Figure 58:

Typical connection diagram using the ADC on page 106 and note below

corrected.

Typical TS_temp value removed from Table 64: TS characteristics on

page 110.

Section 6.1: Package mechanical data on page 111 updated.

Small text changes.

Table 75.

Document revision history

Date

Revision

Changes

STM32F103RCT7 Datasheet(PDF) 125 Page - STMicroelectronics