MEC1322 datasheet(186/456 Pages) MICROCHIP

186 / 456 page

MEC1322

DS00001719D-page 186

 2014 - 2015 Microchip Technology Inc.

0 IPEND

This bit can be used in either a hardwired prioritized or polled envi-

ronment to indicate whether an interrupt is pending. When bit 0 is a

logic ‘0’ an interrupt is pending and the contents of the IIR may be

used as a pointer to the appropriate internal service routine. When

bit 0 is a logic ‘1’ no interrupt is pending.

R1h

RESET

TABLE 14-13: INTERRUPT CONTROL TABLE

FIFO

Mode

Only

Interrupt Identification

Interrupt SET and RESET Functions

Bit 3

Bit 2

Bit 1

Bit 0

Priority

Level

Interrupt Type

Interrupt Source

Interrupt Reset

Control

None

Highest

Receiver Line Sta-

tus

Overrun Error, Par-

ity Error, Framing

Error or Break

Interrupt

Reading the Line

Status Register

Second

Received Data

Available

Receiver Data

Available

Read Receiver Buf-

fer or the FIFO

drops below the

trigger level.

Character Timeout

Indication

No Characters

Have Been

Removed From or

Input to the RCVR

FIFO during the

last 4 Char times

and there is at least

1 char in it during

this time

Reading the

Receiver Buffer

Third

Transmitter Hold-

ing Register Empty

Transmitter Hold-

ing Register Empty

Reading the IIR

of Interrupt) or Writ-

ing the Transmitter

Holding Register

Fourth

MODEM Status

Clear to Send or

Data Set Ready or

Ring Indicator or

Data Carrier Detect

Reading the

MODEM Status

Offset

02h

Bits

Description

Type

Default

Reset

Event

MEC1322 Datasheet(PDF) 186 Page - Microchip Technology

MEC1322 Datasheet(HTML) 186 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL