SWCS049F datasheet(110/119 Pages) TI1

110 / 119 page

110

TPS659110, TPS659112, TPS659113

TPS659114, TPS659118, TPS6591133

SWCS049Q – JUNE 2010 – REVISED MARCH 2016

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Table 8-2. Detailed Revision History (continued)

Version

Literature Number

Date

Notes

(8)

TPS65911 Data Manual, SWCS049G - Version G:

•

Update Section 5.19, Section 5.20, Section 5.21, Section 5.22:

•

Update turn-on time

•

Update DC line regulation

•

Update Section 5.15

•

Update rated output current IOUTmax.

•

Update Section 5.16 and Section 5.17

•

Update rated output current IOUTmax.

•

Update DC line regulation

•

Update DC load regulation

•

Update Section 5.7

•

Update Related Open-Drain I/Os: GPIO2, GPIO7

•

Update Section 5.18

•

Add Supply Current, Internal Reference Voltage, Output discharge, Output drivers, Boot strap switch, Duty and frequency control,

softstart, current sense protection, UVLO, and thermal shutdown.

•

Remove DC line regulation, DC load regulation, Transient load regulation, Overshoot/undershoot, Rated output IOUTmax, and

Conversion efficiency.

•

Section 5.15 and Section 5.17 - Remove Iout = 1500 mA value

•

Table 6-1 - Update VIO, VDD1, VDD2, and VDDCtrl

•

Figure 1-1 - Update VIO, VDD1, and VDD2

(9)

TPS65911 Data Manual, SWCS049H - Version H:

•

Update Section 5.15

•

Update Rated output current description- add ILMAX bit configuration

•

Update PMOS current limit (high-side) description

•

Update NMOS current limit (high-side) description

•

Update Figure 5-2 - CLK32KOUT out pin name (fixed typo)

•

Update Figure 6-1

•

Update Table 6-35, VIO_REG - Update ILMAX description

•

Update Table 6-36, VDD1_REG - Update ILMAX and and TSTEP field numbers and VGAIN_SEL description

•

Update Table 6-39, VDD2_REG - Update VGAIN_SEL description; align bit field numbering

•

Update Table 6-43, VDDCRTL_OP_REG - Update SEL description

•

Update Table 6-44, VDDCRTL_SR_REG - Update SEL description

•

Update Table 5-2 - tdbPWRONF: PWRON falling-edge debouncing delay - Update unit of measure

•

Update Table 5-3 - Replace tACT2SLP by tACT2SLPCK32K

•

Update Figure 5-5 - Replace tdONVMBHI by tdONPWHOLD

•

Update Table 5-4 - Replace tdONVMBHI by tdONPWHOLD

•

Update Section 6.3.3.6 - Replace 100 µs by 100 ms

•

Update Table 6-56 - Add Bit 0,1, and 3 : TURN OFF RESET to the description

•

Update Table 6-57 - Add TSLOT_LENGTH: TURN OFF RESET to the description

•

Update Table 6-72 - Add footnote

(10) TPS65911 Data Manual, SWCS049I - Version I:

•

Update Section 5.1 - Add VDDIO

•

Update Section 5.3 - Add VDDIO

•

Update Section 5.6 - Remove PWRDN

•

Update Table 4-1 - Remove PD from PWRDN

(11) TPS65911 Data Manual, SWCS049J - Version J:

•

Update Section 5.3: Fix typo on HDRST pin

•

Update Section 6.13: Update full reset:

•

Full reset: All digital logic of device is reset.

•

Caused by POR (power on reset) when VCC7 < VBNPR and BB < VBNPR

(12) TPS65911 Data Manual, SWCS049K - Version K

•

Update Table 6-3 - Changed VMBCH_REG to EEPROM

(13) TPS65911 Data Manual, SWCS049L - Version L

•

Update Section 3.1 - Added TPS659116

(14) TPS65911 Data Manual, SWCS049M - Version M

•

Update Section 3.1 - Added TPS65911062

SWCS049G

October 2011

See (8).

SWCS049H

May 2012

See (9)

SWCS049I

June 2012

See (10)

SWCS049J

September 2012

See (11)

SWCS049K

December 2012

See (12)

SWCS049L

February 2014

See (13)

SWCS049M

May 2014

See (14)

SWCS049F Datasheet(PDF) 110 Page - Texas Instruments

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