STM8S003F3 datasheet(103/104 Pages) STMICROELECTRONICS

103 / 104 page

DocID018576 Rev 9

103/104

STM8S003F3 STM8S003K3

Revision history

103

20-Apr-2016

Corrected text strings in Figure 10: External capacitor

CEXT and Figure 37: Recommended reset pin protection

PB4 line PP column value corrected in Table 5:

STM8S003K3 descriptions

PD1 line “floating” and “wpu” column values corrected in

Table 6: STM8S003F3 pin description

SPI_RXCRCR and SPI_TXCRCR reset values

corrected in Table 9: General hardware register map

03-May-2017

Updated:

– All table footnotes from “Guaranteed by design, not

tested in production” to “Guaranteed by design” and

“Data based on characterization results, not tested in

production” to “Data based on characterization

results”

– Section 9.2: Absolute maximum ratings

– Section : Device marking on page 90

– Section : Device marking on page 93

– Section : Device marking on page 96

– Table 54: UFQFPN20 - 20-lead, 3 x3 mm, 0.5 mm

pitch, ultra thin fine pitch quad flat package

mechanical data

– Figure 50: UFQFPN20 - 20-lead, 3 x 3 mm, 0.5 mm

pitch, ultra thin fine pitch quad flat package outline

– Figure 17: HSE external clock source was centered

into the frame.

Table 56. Document revision history (continued)

Date

Revision

Changes

STM8S003F3 Datasheet(PDF) 103 Page - STMicroelectronics