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TC7MPS3125FK Datasheet (PDF) - Toshiba Semiconductor

TC7MPS3125FK Datasheet PDF - Toshiba Semiconductor
Part # TC7MPS3125FK
Download  TC7MPS3125FK Download
File Size   322.35 Kbytes
Page   23 Pages
Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor
Description Low Voltage/Low Power 1 3-Bit Dual Supply Bus Transceiver

TC7MPS3125FK Datasheet (PDF)

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TC7MPS3125FK Datasheet PDF - Toshiba Semiconductor

Part # TC7MPS3125FK
Download  TC7MPS3125FK Click to download

File Size   322.35 Kbytes
Page   23 Pages
Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor
Description Low Voltage/Low Power 1 3-Bit Dual Supply Bus Transceiver

TC7MPS3125FK Datasheet (HTML) - Toshiba Semiconductor


TC7MPS3125FK Product details

The TC7MPS3125FK/FTG is a dual supply, advanced
high-speed CMOS 4-bit dual supply voltage interface bus
transceiver fabricated with silicon gate CMOS technology.
It is also designed with over voltage tolerant inputs and
outputs up to 3.6 V.
Designed for use as an interface between a 1.2-V, 1.5-V, 1.8-V,
or 2.5-V bus and a 1.8-V, 2.5-V or 3.6-V bus in mixed 1.2-V, 1.5-V,
1.8-V or 2.5-V/1.8-V, 2.5-V or 3.6-V supply systems.
The A-port interfaces with the 1.2-V, 1.5-V, 1.8-V or 2.5-V bus,
the B-port with the 1.8-V, 2.5-V, 3.3-V bus.
The direction of data transmission is determined by the level of
the DIR input. The enable input (OE) can be used to disable the
device so that the buses are effectively isolated. (Note1)
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.

Features
• Bidirectional interface between 1.2-V and 1.8-V, 1.2-V and
2.5-V, 1.2-V and 3.3-V, 1.5-V and 2.5-V, 1.5-V and 3.3-V, 1.8-V
and 2.5-V, 1.8-V and 3.3-V or 2.5-V and 3.3-V buses.
• High-speed operation: tpd = 6.8 ns (max) (VCCA = 2.5 ± 0.2 V,
VCCB = 3.3 ± 0.3 V)
tpd = 8.9 ns (max) (VCCA = 1.8 ± 0.15 V,
VCCB = 3.3 ± 0.3 V)
tpd = 10.3 ns (max) (VCCA = 1.5 ± 0.1 V, VCCB = 3.3 ± 0.3 V)
tpd = 61 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 3.3 ± 0.3 V)
tpd = 9.5 ns (max) (VCCA = 1.8 ± 0.15 V, VCCB = 2.5 ± 0.2 V)
tpd = 10.8 ns (max) (VCCA = 1.5 ± 0.1 V, VCCB = 2.5 ± 0.2 V)
tpd = 60 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 2.5 ± 0.2 V)
tpd = 58 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 1.8 ± 0.15 V)
• Output current: IOH/IOL = ±12 mA (min) (VCC = 3.0 V)
IOH/IOL = ±9mA (min) (VCC = 2.3 V)
IOH/IOL = ±3 mA (min) (VCC = 1.65 V)
IOH/IOL = ±1mA (min) (VCC = 1.4 V)
• Latch-up performance: ±300 mA
• ESD performance: Machine model ≥ ±200 V
Human body model ≥ ±2000 V
• Ultra-small package: VSSOP (US16), VQON16
• Low current consumption: Using the new circuit significantly reduces current consumption when OE = “H”.
Suitable for battery-driven applications such as PDAs and cellular phones.
• Floating A-bus and B-bus are permitted. (when OE = “H”)
• 3.6-V tolerant function and power-down protection provided on all inputs and outputs.
Note 1: Do not apply a signal to any bus pins when it is in the output mode. Damage may result.




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