■ DESCRIPTION
The MBM29BS/FS12DH is a 128 Mbit, 1.8 Volt-only, Burst mode and dual operation Flash memory organized as 8M words of 16 bits each. The device offered in a 80-ball FBGA package. This device is designed to be programmed in-system with the standard system 1.8 V VCC supply. 12.0 V VPP and 5.0 V VCC are not required for write or erase operations. The device can also be programmed in standard EPROM programmers.

■ FEATURES
• 0.13 µm process technology
• Single 1.8 V read, program and erase (1.65 V to 1.95 V)
• Simultaneous Read/Write operation (Dual Bank)
• FlexBankTM*1
    Bank A: 16 Mbit (4 Kwords × 8 and 32 Kwords × 31)
    Bank B: 48 Mbit (32 Kwords × 96)
    Bank C: 48 Mbit (32 Kwords × 96)
    Bank D: 16 Mbit (4 Kwords × 8 and 32 Kwords × 31)
• Enhanced VI/OTM*2 (VCCQ) Feature
    Input/ Output voltage generated on the device is determined based on the VI/O level
• High Performance Burst frequency reach at 66 MHz
    Burst access times of 11 ns @ 30 pF at industrial temperature range
    Asynchronous random access times of 50 ns (at 30 pF)
    Synchronous latency of 56 ns with 1.8 V VCCQ for Handshaking mode
• Programmable Burst Interface
    Linear Burst: 8, 16, and 32 words with wrap-around
• Compatible with JEDEC-standard commands
    Uses same software commands as E2PROMs
• Minimum 100,000 program/erase cycles
• Sector Erase Architecture
    Eight 4 Kwords, two hundred fifty-four 32 Kwords sectors, eight 4 Kwords sectors.
    Any combination of sectors can be concurrently erased. Also supports full chip erase.
• HiddenROM region
    64 words for factory and 64 words for customer of HiddenROM, accessible through a new “HiddenROM Enable”
    command sequence
    Factory serialized and protected to provide a sector secure serial number (ESN)
• Write Protect Pin (WP)
    At VIL, allows protection of “outermost” 4×4 K words on low, high end or both ends of boot sectors, regardless
    of sector protection/unprotection status
• Accelerate Pin (ACC)
    At VACC, increases program performance. ; all sectors locked when ACC = VIL
• Embedded EraseTM*2 Algorithms
    Automatically preprograms and erases the chip or any sector
• Embedded ProgramTM*2 Algorithms
    Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready Output (RDY)
    In Synchronous Mode, indicates the status of the Burst read.
    In Asynchronous Mode, indicates the status of the internal program and erase function.
• Automatic sleep mode
    When address remain stable, the device automatically switches itself to low power mode
• Erase Suspend/Resume
    Suspends the erase operation to allow a read data and/or program in another sector within the same device
• In accordance with CFI (Common Flash Interface)
• Hardware reset pin (RESET)
    Hardware method to reset the device for reading array data
• Sector Protection
    Persistent sector protection
    Password sector protection
    ACC protects all sectors
    WP protects the outermost 4 x 4 K words on both ends of boot sectors, regardless of sector protection /
    unprotection status.
• Handshaking feature available (MBM29FS12DH)
    Provides host system with minimum possible latency by monitoring RDY
• CMOS compatible inputs, CMOS compatible outputs