General Description
The SY89228U is a precision, low jitter 1GHz ÷3, ÷5 clock divider with an LVPECL output. A unique FailSafe Input (FSI) protection prevents metastable output conditions when the input clock voltage swing drops significantly below 100mV or input is removed.

Features
• Accepts a high-speed input and provides a precision ÷3 and ÷5 sub-rate, LVPECL output
• Fail-Safe Input
    – Prevents oscillations when input is invalid
• Guaranteed AC performance over temperature and supply voltage:
    – DC-to >1.0GHz throughput
    – < 1500ps Propagation Delay (In-to-Q)
    – < 270ps Rise/Fall times
• Ultra-low jitter design:
    – <1psRMS random jitter
    – <1psRMS cycle-to-cycle jitter
    – <10psPP total jitter (clock)
    – <0.7psRMS MUX crosstalk induced jitter
• Unique patented internal termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL, LVDS)
• Wide input voltage range VCC to GND
• 800mV LVPECL output
• 46% to 54% Duty Cycle(÷ 3)
• 47% to 53% Duty Cycle(÷ 5)
• 2.5V ±5% or 3.3V ±10% supply voltage
• -40°C to +85°C industrial temperature range
• Available in 16-pin (3mm x 3mm) QFN package

Applications
• Fail-safe clock protection