GENERAL DESCRIPTION
The device feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input.

FEATURES
GENERAL
• Single Power Supply Operation
    - 2.7 to 3.6 volt for read, erase, and program operations
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• 67,108,864 x 1 bit structure or 33,554,432 x 2 bits (Dual Output mode) structure
• 2048 Equal Sectors with 4K byte each
    - Any Sector can be erased individually
• 128 Equal Blocks with 64K byte each
    - Any Block can be erased individually
• Program Capability
    - Byte base
    - Page base (256 bytes)
• Latch-up protected to 100mA from -1V to Vcc +1V

PERFORMANCE
• High Performance
    - Fast access time: 86MHz serial clock
    - Serial clock of Dual Output mode: 80MHz
    - Fast program time: 0.6ms(typ.) and 3ms(max.)/page
    - Byte program time: 9us (typ.)
    - Fast erase time: 40ms(typ.) /sector; 0.4s(typ.)/block
• Low Power Consumption
    - Low active read current: 25mA(max.) at 86MHz
    - Low active programming current: 15mA (typ.)
    - Low active sector erase current: 9mA (typ.)
    - Low standby current: 12uA (typ.)
    - Deep power-down mode 2uA (typ.)
• Typical 100,000 erase/program cycles
• 20 years of data retention