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FDMF2011 Datasheet(PDF) 4 Page - ON Semiconductor |
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FDMF2011 Datasheet(HTML) 4 Page - ON Semiconductor |
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4 / 31 page  © 2016 Fairchild Semiconductor Corporation www.fairchildsemi.com FDMF2011 Rev.1.0 3 Pin Definitions Pin Name Function 1, 29, 32, 34 N/C No connect 2 VDD Power supply input for low-side gate drive and bootstrap diode. Bypass this pin to VSS with a low impedance capacitor. 3 HI High-side PWM input. 4 LI Low-side PWM input. 5, 10,11, 22, 23, 33, 37 PGND Power return for the power stage. Package header, pin 37 and PGND are internally fused (shorted). 6 VSS Analog ground for driver IC analog circuits. 7,9 LG Low-side MOSFET gate. 8 LO Low-side gate drive output. 12-21 SW Switching node junction between high-side and Low-side MOSFETs. 24-28 VIN Power input for the power stage. Bypass this pin to PGND with low impedance capacitor. 30 HG High-side MOSFET gate. 31 PH High-side source connection (SW node) for the bootstrap capacitor. 35 HB Bootstrap supply for high-side driver. Bypass this pin to PH with low impedance capacitor. 36 HO High-side gate drive output. Table 1. Pin Definitions |
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