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MMBTA06 Datasheet(PDF) 1 Page - Diotec Semiconductor |
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MMBTA06 Datasheet(HTML) 1 Page - Diotec Semiconductor |
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1 / 2 page ![]() MMBTA06 MMBTA06 SMD High Voltage NPN Transistors SMD Hochspannungs-NPN-Transistoren IC = 500 mA hFE > 100 Tjmax = 150°C VCEO = 80 V Ptot = 250 mW Version 2018-01-18 SOT-23 (TO-236) 1 = B 2 = E 3 = C Dimensions - Maße [mm] Typical Applications Signal processing, Switching, Amplification Commercial grade 1) Typische Anwendungen Signalverarbeitung, Schalten, Verstärken Standardausführung 1) Features General Purpose Compliant to RoHS, REACH, Conflict Minerals 1) Besonderheiten Universell anwendbar Konform zu RoHS, REACH, Konfliktmineralien 1) Mechanical Data 1) Mechanische Daten 1) Taped and reeled 3000 / 7“ Gegurtet auf Rolle Weight approx. 0.01 g Gewicht ca. Case material UL 94V-0 Gehäusematerial Solder & assembly conditions 260°C/10s Löt- und Einbaubedingungen MSL = 1 Type Code Recommended complementary PNP transistors Empfohlene komplementäre PNP-Transistoren 1GM MMBTA56 Maximum ratings 2) Grenzwerte 2) Collector-Emitter-voltage – Kollektor-Emitter-Spannung B open VCEO 80 V Collector-Base-voltage – Kollektor-Basis-Spannung E open VCBO 80 V Emitter-Base-voltage – Emitter-Basis-Spannung C open VEBO 4 V Power dissipation – Verlustleistung Ptot 250 mW 3) Collector current – Kollektorstrom DC IC 500 mA Base current – Basisstrom I B 100 mA Peak Base current – Basis-Spitzenstrom IBM 200 mA Junction temperature – Sperrschichttemperatur Storage temperature – Lagerungstemperatur Tj TS -55...+150°C -55…+150°C Characteristics Kennwerte Tj = 25°C Min. Typ. Max. DC current gain – Kollektor-Basis-Stromverhältnis 4) - VCE = 1 V - IC = 10 mA - IC = 100 mA hFE 100 100 – – 1 Please note the detailed information on our website or at the beginning of the data book Bitte beachten Sie die detaillierten Hinweise auf unserer Internetseite bzw. am Anfang des Datenbuches 2 TA = 25°C and per diode, unless otherwise specified – TA = 25°C und pro Diode, wenn nicht anders angegeben 3 Mounted on P.C. board with 3 mm2 copper pad at each terminal Montage auf Leiterplatte mit 3 mm2 Kupferbelag (Lötpad) an jedem Anschluss 4 Tested with pulses tp = 300 µs, duty cycle ≤ 2% – Gemessen mit Impulsen tp = 300 µs, Schaltverhältnis ≤ 2% © Diotec Semiconductor AG http://www.diotec.com/ 1 Pb RoHS 1.1 +0.1 0.4+0.1 2.9 ±0.1 1 2 3 Type Code 1.9±0.1 -0.05 -0.2 |
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