L9680 datasheet(144/277 Pages) STMICROELECTRONICS

144 / 277 page

SPI interfaces

L9680

144/277

DocID029257 Rev 1

F200 (SAF_CONTROL_4)

F300 (SAF_CONTROL_5)

F400 (SAF_CONTROL_6)

F500 (SAF_CONTROL_7

F600 (SAF_CONTROL_8)

F700 (SAF_CONTROL_9)

F800 (SAF_CONTROL_10)

F900 (SAF_CONTROL_11)

FA00 (SAF_CONTROL_12)

FB00 (SAF_CONTROL_13)

FC00 (SAF_CONTROL_14)

FD00 (SAF_CONTROL_15)

FE00 (SAF_CONTROL_16)

Write:

80DE (SAF_CONTROL_1)

80E0 (SAF_CONTROL_2)

80E2 (SAF_CONTROL_3)

80E4 (SAF_CONTROL_4)

80E6 (SAF_CONTROL_5)

80E8 (SAF_CONTROL_6)

80EA (SAF_CONTROL_7

80EC (SAF_CONTROL_8)

80EE (SAF_CONTROL_9)

80F0 (SAF_CONTROL_10)

80F2 (SAF_CONTROL_11)

80F4 (SAF_CONTROL_12)

80F6 (SAF_CONTROL_13)

80F8 (SAF_CONTROL_14)

80FA (SAF_CONTROL_15)

80FC (SAF_CONTROL_16)

ARMSELx

00 ARMINT select for safing recode x - correlates A

Updated by SSM_RESET or SPI write while in DIAG state

00 ARMP OR ARMN

01 ARMP

10 ARMN

11 ARMP OR ARMN

SPIFLDSELx

SPI field select for safing record x - determines which 16-bit field in long

SPI messages (>31 bit) to use for response on MISO of SPI monitor.

In case of messages less than 32 bits this bit is don't care. Updated by

SSM_RESET or SPI write while in DIAG state.

Updated by SSM_RESET or SPI write while in DIAG state

0 First 16 bits of SPI MISO frame used for Response Mask and Data

Mask bit-wise AND

1 Last 16 bits of SPI MISO frame used for Response Mask and Data

Mask bit-wise AND

L9680 Datasheet(PDF) 144 Page - STMicroelectronics

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