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L9680 Datasheet(PDF) 151 Page - STMicroelectronics |
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L9680 Datasheet(HTML) 151 Page - STMicroelectronics |
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151 / 277 page  DocID029257 Rev 1 151/277 L9680 SPI interfaces 276 Cleared by SSM_RESET or SPI read or when channel is commanded OFF via SPI RSCTRL updated when a valid PSI5 frame is received Wheel speed configured channel (RSDR0, RSDR1, RSDR2, RSDR3) CRC[2:0] - - - CRC based on bits [16:0] Updated based on bits [16:0] STDSTL 0 0 0 Standstill indication (valid only for VDA sensor or PWM 2 edges) 1 Standstill 0 Valid Sensor Signal FLT 1 1 1 Fault Status - Depending on Fault Status, the DATA bits are defined differently Cleared when all of the following bits are '0': STG, STB, CURRENT_HI, OPENDET, RSTEMP, INVALID, PULSE OVERFLOW ERROR, NODATA Set when any of the following bits are '1': STG, STB, CURRENT_HI, OPENDET, RSTEMP, INVALID, PULSE OVERFLOW ERROR, NODATA 0 No Fault 1 Fault Latch_D0 0 0 0 Logical Channel ID 0 no prior bit0 faults 1 prior message(s) contained bit0 fault LCID[1:0] Logical Channel ID 00 RSU0 01 RSU1 10 RSU2 11 RSU3 DATA[11:0] $000 $000 $000 12-bit data from wheel speed decoder VDA Data Format DATA [7:0] Counter bits DATA [11:8] Counter bits PWM Data Format DATA [8:0] Pulse Data bits |
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