Preliminary Datasheet

LP6286

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Page 4 of 8

LP6286–00 Version 0.0 NOV.-2016

Functional Pin Description

Pin NO.

Pin Name

Description

1

OPP

OPA Non-Inverting Input.

2

OPN

OPA Inverting Input.

3

OPO

OPA Output.

4

OGND

Ground for OPA. Connect this pin to ground.

5

AVDD

VDD for Source Driver Power. This also supplies the Charge-Pump/OPA power source.

6

DRVP

VGH Charge-Pump Regulator Driver Output.

7

DRVN

VGL Charge-Pump Regulator Driver Output.

8

VFLK

VFLK is produced by timing controller for charging or discharging VGHM.

9

RST����� Open-DrainOutputforReset.ActiveLow.

10

FBP

VGH Charge-Pump Regulator Feedback Input. Connect to an external resistive

voltage divider from the VGH to GND to set the output voltage.

11

FBN

VGL Charge-Pump Regulator Feedback Input. Connect to an external resistive

voltage divider from the VGL to REF to set the output voltage.

12

REF

Reference Voltage Output. Connect a ceramic capacitor between REF and GND.

13

VIN

Supply Input. The input voltage range is between 2.5V to 5.5V. Connect a ceramic

capacitor between VIN and GND.

14

AGND

Analog GND.

15

VDET

Voltage Detector Input. Connect to an external resistive voltage divider from the

VIN to AGND.

16

COMP

Boost Regulator Error Amplifier Compensation Pin.

17

FB

Boost Regulator Feedback Input. Connect to an external resistive voltage divider

from the output to FB to set the output voltage.

18

PGND

Power Ground.

19

PGND

Power Ground.

20

LX

Boost Regulator Switching Node. Connect the inductor and the schottky diode to LX.

21

DRN

GPM Discharge Pin. Connect a resistor between DRN and GND.

22

VGHM

GPM Output.

23

VGH

GPM Input.

24

DLY

VGHM Delay Discharge Time. Connect a capacitor between DLY and GND.

EP

Exposed pad. Connect this pin to other gnd pin.