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AT89C51ED2-RDTIM Datasheet(PDF) 77 Page - ATMEL Corporation |
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AT89C51ED2-RDTIM Datasheet(HTML) 77 Page - ATMEL Corporation |
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77 / 137 page  77 AT89C51RD2/ED2 4235E–8051–04/04 Table 54. IPL0 Register IPL0 - Interrupt Priority Register (B8h) Reset Value = X000 0000b Bit addressable 76 54 32 1 0 - PPCL PT2L PSL PT1L PX1L PT0L PX0L Bit Number Bit Mnemonic Description 7- Reserved The value read from this bit is indeterminate. Do not set this bit. 6 PPCL PCA interrupt Priority bit Refer to PPCH for priority level. 5PT2L Timer 2 overflow interrupt Priority bit Refer to PT2H for priority level. 4 PSL Serial port Priority bit Refer to PSH for priority level. 3PT1L Timer 1 overflow interrupt Priority bit Refer to PT1H for priority level. 2PX1L External interrupt 1 Priority bit Refer to PX1H for priority level. 1PT0L Timer 0 overflow interrupt Priority bit Refer to PT0H for priority level. 0PX0L External interrupt 0 Priority bit Refer to PX0H for priority level. |
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