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ZL2103 Datasheet(PDF) 11 Page - Renesas Technology Corp |
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ZL2103 Datasheet(HTML) 11 Page - Renesas Technology Corp |
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11 / 28 page  ZL2103 FN6966 Rev 5.00 Page 11 of 28 May 3, 2011 The ZL2103 integrates two N-channel power MOSFETs; QH is the top control MOSFET and QL is the bottom synchronous MOSFET. The amount of time that QH is on as a fraction of the total switching period is known as the duty cycle D, which is described by Equation 1: During time D, QH is on and VIN – VOUT is applied across the inductor. The output current ramps up as shown in Figure 11. When QH turns off (time 1-D), the current flowing in the inductor must continue to flow from the ground up through QL, during which the current ramps down. Since the output capacitor COUT exhibits low impedance at the switching frequency, the AC component of the inductor current is filtered from the output voltage so the load sees nearly a DC voltage. The maximum conversion ratio is shown in Figure 9. Typically, buck converters specify a maximum duty cycle that effectively limits the maximum output voltage that can be realized for a given input voltage and switching frequency. This duty cycle limit ensures that the low-side MOSFET is allowed to turn on for a minimum amount of time during each switching cycle, which enables the bootstrap capacitor to be charged up and provide adequate gate drive voltage for the high-side MOSFET. DIGITAL COMPENSATOR INPUT VOLTAGE BUS VOUT BST DIGITAL COMPENSATOR D-PWM + - VSEN RESET SYNC PLL POWER MANAGEMENT TEMP SENSOR MUX EN VSET PG SA CFG SW VDD COMMUNICATION REF SYNC GEN VTRK SCL SDA SALRT > > ADC ADC ADC FC LDO ISENSE HS FET DRIVER SS ISENSE DDC MGN NVM LS FET DRIVER DIGITAL COMPENSATOR INPUT VOLTAGE BUS VOUT BST DIGITAL COMPENSATOR D-PWM + - VSEN RESET SYNC PLL POWER MANAGEMENT TEMP SENSOR MUX EN VSET PG SA CFG SW VDD COMMUNICATION REF SYNC GEN VTRK SCL SDA SALRT > > ADC ADC ADC FC LDO ISENSE HS FET DRIVER SS ISENSE DDC MGN NVM LS FET DRIVER FIGURE 10. ZL2103 BLOCK DIAGRAM IN OUT V V D (EQ. 1) Time VIN -VOUT 0 -VOUT 1 - D IO ILPK ILV D FIGURE 11. INDUCTOR WAVEFORM |
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