OR73 is a 7-input OR gate with 3x drive strength.

Truth Table

D

B

C

E

F

G

A

Q

Capacitance

AB

C

D

E

F

G

Q

Ci (pF)

LLLL

LL

L

L

A

0.046

H

XXX

XX

X

H

B

0.043

X

H

XX

XX

X

H

C

0.048

XX

H

X

XX

X

H

D

0.044

XXX

H

X

X

X

H

E

0.041

XXXX

H

X

X

H

F

0.043

XXXX

X

H

X

H

G

0.048

XXXX

XX

H

H

Area

Power

1.35 mils

2

6.28 µW / MHz

Delay [ns] = tpd.. = f(SL, L)

with SL = Input Slope [ns] ; L = Output Load [pF]

Output Slope [ns] = op_sl.. = f(L)

with L = Output Load [pF]

AC Characteristics :

Tj = 25°C

VDD = 3.3V

Typical Process

AC Characteristics

Characteristics

Symbol

SL = 0.1

SL = 2.0

L = 0.3

L = 2.1

L = 3.0

L = 0.3

L = 2.1

L = 3.0

Delay A to Q

tpdar

0.69

2.12

2.86

0.94

2.38

3.04

tpdaf

0.58

1.56

2.01

0.82

1.77

2.26

Delay B to Q

tpdbr

0.76

2.21

2.87

1.05

2.50

3.23

tpdbf

0.66

1.63

2.08

0.79

1.75

2.25

Delay C to Q

tpdcr

0.87

2.30

2.99

1.10

2.52

3.20

tpdcf

0.67

1.65

2.12

0.77

1.73

2.23

Delay D to Q

tpddr

0.66

2.13

2.84

0.92

2.38

3.02

tpddf

0.70

1.75

2.20

0.94

1.98

2.44

Delay E to Q

tpder

0.74

2.21

2.89

1.00

2.43

3.23

tpdef

0.82

1.87

2.32

0.97

2.01

2.47

Delay F to Q

tpdfr

0.80

2.32

2.97

1.07

2.57

3.27

tpdff

0.88

1.91

2.38

0.98

2.03

2.48

Delay G to Q

tpdgr

0.86

2.35

3.04

1.13

2.60

3.36

tpdgf

0.89

1.92

2.38

0.96

2.00

2.47

Output Slope A to Q

op_slar

1.02

5.30

7.28

1.03

5.23

7.32

op_slaf

0.68

3.51

4.76

0.67

3.53

4.85

Sept. 1996

- 355 -

Rev. N/C

Austria Mikro S ysteme International

R

0.6 µm CMOS

CUB

OR73

OR73