ATF750LVC

3

Clock Mux

Output Options

Bus-friendly Pin-keeper Input and I/Os

All input and I/O pins on the ATF750LVC(L) have program-

mable “pin-keeper” circuits. If activated, when any pin is

driven high or low and then subsequently left floating, it will

stay at that previous high or low level.

This circuitry prevents unused input and I/O lines from

floating to intermediate voltage levels, which cause unnec-

essary power consumption and system noise. The keeper

circuits eliminate the need for external pull-up resistors and

eliminate their DC power consumption.

Enabling or disabling of the pin-keeper circuits is controlled

by the device type chosen in the logic compiler device

selection menu. Please refer to the software compiler table

for more details. Once the pin-keeper circuits are disabled,

normal termination procedures are required for unused

inputs and I/Os.

Input Diagram

I/O Diagram

SELECT

LOGIC

TO

CELL

CLOCK

PRODUCT

TERM

CLK

CKi

CK MUX

PIN

Table 1. Software Compiler Mode Selection

Synario

Wincupl

Pin-keeper Circuit

ATF750LVC

V750C

Disabled

ATF750LVC (PPK)

V750CPPK

Enabled

100K

V

CC

ESD

PROTECTION

CIRCUIT

INPUT

PROGRAMMABLE

OPTION

100K

V

CC

V

CC

DATA

OE

I/O

PROGRAMMABLE

OPTION