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FM8PC71AM Datasheet(PDF) 28 Page - Feeling Technology Corp. |
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FM8PC71AM Datasheet(HTML) 28 Page - Feeling Technology Corp. |
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28 / 73 page ![]() FM8PC71AM This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product. P.28 R1.1.004, Aug 7, 2017 FM8PC71AM 遠翔科技 Feeling Technology *WDR, LVDT24, LVDT2.0 or EXR occurs, the RSTSL[1:0] bits can’t be reset to default value. Bit[2] : LVDT36 (Read only) Low Voltage(3.6V) detect signal. 1 = VDD voltage >= 3.6V.; 0 = VDD voltage < 3.6 V Bit[1] : LVDT24(Read only) Low Voltage(2.4V) detect signal. 1 = VDD voltage >= 2.4V. 0 = VDD voltage < 2.4V Bit[0] : LVDT20(Read only) Low Voltage(2.0V) detect signal. 1 = VDD voltage >= 2.0V. 0 = VDD voltage < 2.0V Figure 3.0-1 Power on Reset and LVDT20, LVDTA(2.0V), LVDT24, LVDT36 Timing Power EXTR WDR LVR Global Reset Power on Detect Level Power on Reset Delay-Time (130us~17ms) Low-voltage reset Delay-Time (130us~17ms) Watchdog Overflow Watchdog Reset Delay-Time (10ns) LVR detect Voltage Glitch > 100ns Figure 3.0-2 Global Timing |
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