GPL191B2

© Generalplus Technology Inc.

Proprietary & Confidential

14

Mar. 08, 2010

Version: 1.1

8.3. LCD in 1/8 Duty or 1/12 Duty, IOAB7 - 0, IOCD3 - 0, IOEF5 - 0

CUP1

CUP2

HVLCD

VLCD

SEG5

SEG22

SEG32

SEG31

SEG30

SEG29

SEG28

SEG27

SEG26

SEG25

SEG24

SEG23

SEG21

SEG20

SEG19

SEG18

SEG17

SEG16

SEG15

SEG14

SEG13

SEG12

SEG11

SEG10

SEG9

SEG8

SEG6

SEG7

SEG33

RESET

ROSC

X32I

X32O

VDD

IOCD0

IOAB4

IOAB3

IOAB2

IOAB1

IOAB0

Note1

VSS

IOEF0

IOEF1

IOEF2

IOEF3

IOCD3

IOCD2

IOCD1

PVSS

AUDN

PVDD

AUDP

Rsys

Note1:

SEG59 - 52 can be mask-option for IOAB7 - 0. TxD and RxD can be used for IOEF4, IOEF5 when UART is not used.

Note2:

These capacitors must be connected if voltage doubler and voltage regulator are used.

Note3:

Wire route path from capacitors (C6 - 1) to chip should be as close as possible.

Note4:

If voltage doubler and voltage regulator are not used, VLCD should be connected to VDD.

Note5:

C7, C8 and crystal should be placed as close as possible to X32I and X32O. A shielding by ground is suggested.

Note6:

The value of C7 and C8 are for design guidance only. Different capacitor values may be required for different crystal/resonator used.

Note7:

The capacitor value of C1 is from 30pF to 200pF, according to system noise level.