STM8S datasheet(309/467 Pages) STMICROELECTRONICS

Part #	STM8S

Description	STM8S Series and STM8AF Series 8-bit microcontrollers

PDF	467 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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309 / 467 page

DocID14587 Rev 14

309/467

RM0016

Inter-integrated circuit (I2C) interface

319

21.7.6

Data register (I2C_DR)

Address offset: 0x06

Reset value: 0x00

654

3210

DR[7:0]

Bits 7:0 DR[7:0]: Data register (1)(2)(3)

Byte received or to be transmitted to the bus.

– Transmitter mode: Byte transmission starts automatically when a byte is written in the DR register. A

continuous transmit stream can be maintained if the next data to be transmitted is put in DR once

the transmission is started (TXE=1)

– Receiver mode: Received byte is copied into DR (RXNE=1). A continuous transmit stream can be

maintained if DR is read before the next data is received (RXNE=1).

1. In slave mode, the address is not copied into DR.

2. Write collision is not managed (DR can be written if TXE=0).

If an ARLO event occurs on ACK pulse, the received byte is not copied into DR and so cannot be read.

STM8S Datasheet(PDF) 309 Page - STMicroelectronics