GPIO5 datasheet(50/60 Pages) MICROCHIP

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USB5806

DS00002236D-page 50

 2016-2018 Microchip Technology Inc.

9.7

Clock Specifications

The device can accept either a 25MHz crystal or a 25MHz single-ended clock oscillator (±50ppm) input. If the single-

ended clock oscillator method is implemented, XTALO should be left unconnected and XTALI/CLKIN should be driven

with a nominal 0-3.3V clock signal. The input clock duty cycle is 40% minimum, 50% typical and 60% maximum.

It is recommended that a crystal utilizing matching parallel load capacitors be used for the crystal input/output signals

(XTALI/XTALO). The following circuit design (Figure 9-6) and specifications (Table 9-10) are required to ensure proper

operation.

9.7.1

CRYSTAL SPECIFICATIONS

It is recommended that a crystal utilizing matching parallel load capacitors be used for the crystal input/output signals

(XTALI/XTALO). Refer to Table 9-10 for the recommended crystal specifications.

tceh

Chip enable (SPI_CE_EN) high time

tclq

Clock to input data

tdh

Input data hold time

tos

Output setup time

toh

Output hold time

tov

Clock to output valid

tcel

Chip enable (SPI_CE_EN) low to first clock

tceh

Last clock to chip enable (SPI_CE_EN) high

FIGURE 9-6:

25MHZ CRYSTAL CIRCUIT

TABLE 9-10:

CRYSTAL SPECIFICATIONS

PARAMETER

SYMBOL

MIN

NOM

MAX

UNITS

NOTES

Crystal Cut

AT, typ

Crystal Oscillation Mode

Fundamental Mode

Crystal Calibration Mode

Parallel Resonant Mode

Frequency

Ffund

25.000

MHz

Frequency Tolerance @ 25oCFtol

±50

PPM

Frequency Stability Over Temp

Ftemp

±50

PPM

Frequency Deviation Over Time

Fage

±3 to 5

PPM

Note 6

Total Allowable PPM Budget

±100

PPM

Note 7

Shunt Capacitance

7 typ

TABLE 9-9:

SPI TIMING (60 MHZ OPERATION)

Symbol

Description

Min

Typ

Max

Units

XTALO

XTALI

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