ATXMEGA8E5 datasheet(63/153 Pages) MICROCHIP

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 2018 Microchip Technology Inc.

Data Sheet Complete

DS40002059A-page 63

ATxmega32E5/16E5/8E5

31. Programming and Debugging

31.1 Features

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Programming



External programming through PDI interface

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Minimal protocol overhead for fast operation

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Built-in error detection and handling for reliable operation



Boot loader support for programming through any communication interface



Debugging



Nonintrusive, real-time, on-chip debug system



No software or hardware resources required from device except pin connection



Program flow control



Go, Stop, Reset, Step Into, Step Over, Step Out, Run-to-Cursor



Unlimited number of user program breakpoints

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Unlimited number of user data breakpoints, break on:



Data location read, write, or both read and write

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Data location content equal or not equal to a value

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Data location content is greater or smaller than a value

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Data location content is within or outside a range

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No limitation on device clock frequency

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Program and Debug Interface (PDI)

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Two-pin interface for external programming and debugging

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Uses the Reset pin and a dedicated pin

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No I/O pins required during programming or debugging

31.2 Overview

The Program and Debug Interface (PDI) is a Microchip proprietary interface for external programming and on-chip debug-

ging of a device. The PDI supports fast programming of nonvolatile memory (NVM) spaces; flash, EEPOM, fuses, lock bits,

and the user signature row.

Debug is supported through an on-chip debug system that offers nonintrusive, real-time debug. It does not require any soft-

ware or hardware resources except for the device pin connection. Using the Microchip tool chain, it offers complete

program flow control and support for an unlimited number of program and complex data breakpoints. Application debug

can be done from a C or other high-level language source code level, as well as from an assembler and disassemble level.

Programming and debugging can be done through the PDI physical layer. This is a two-pin interface that uses the Reset

pin for the clock input (PDI_CLK) and one other dedicated pin for data input and output (PDI_DATA). Any external pro-

grammer or on-chip debugger/emulator can be directly connected to this interface.

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