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ASM2I99456 Datasheet(PDF) 2 Page - Alliance Semiconductor Corporation |
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ASM2I99456 Datasheet(HTML) 2 Page - Alliance Semiconductor Corporation |
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2 / 14 page ![]() June 2005 ASM2I99456 rev 0.2 3.3V/2.5V LVCMOS Clock Fanout Buffer 2 of 14 Notice: The information in this document is subject to change without notice. Block Diagram Pin Configuration 0 1 CLK CLK÷ 2 QA0 QA1 QA2 QB0 QB1 QB2 QC0 QC1 QC2 QC3 Bank A Bank B Bank C 25K 25K 25K 25K 25K 25K VCC/2 ASM2I99456 Logic Diagram PCLK PCLK FSELA FSELB FSELC MR/OE 0 1 0 1 VCCA QA2 GND QA1 VCCA QA0 GND MR/OE QC3 25 24 26 27 28 29 30 31 32 1 23 456 78 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 GND QC2 VCCC QC1 GND QC0 VCCC ASM2I99456 VCCB is internally connected to VCC |
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