MAS3506D datasheet(22/52 Pages) MICRONAS

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MAS 3506D

PRELIMINARY DATA SHEET

Micronas

PIO-Register

The PIO-register is used to monitor the actual status of the PIO-

pins for both, PIO-output and PIO-input lines. Bit 0 of the PIO reg-

ister corresponds to pin PI0, bit 1 to PI1 etc. Due to the latency of

the MAS 3506D only slow events (>1 ms) can be monitored.

Please also refer to Section 4.6.3.2.

bit [19]

BC-FRAME-TOGGLE

Output level toggles with each BC-frame,

tframe = 432 ms

bit [18]

BCENABLE

use SID*, SII*, SIC*

use SID, SII, SIC

bit [13]

BC-FRAME-SYNC

cleared after SCH-read operation

start of new frame

bit [12]

BC-SYNC

unsynchronized

synchronized to BC

bit [8]

Decoding-ERROR

no error

error or sync lost

bit [4]

MPEG-FRAME-SYNC

cleared after anciliary data were read

sync to a new MPEG-frame

bit [3]

AUD-SW

This bit may be used to monitor a signal

from the headphone jack that indicates

switching between headphone and

loudspeaker mode.

bit [2:0]

These three free input lines return the

state logic level of the respective PIO-

pins. They may be used as a port

expansion of the controller.

PIO

Table 3–10: Control Registers, continued

Address

(hex)

R/W

Function

Default

(hex)

Name

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