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STM32H747AI Datasheet(PDF) 210 Page - STMicroelectronics

Part # STM32H747AI
Description  Dual 32-bit Arm® Cortex®-M7 up to 480MHz and -M4 MCUs, up to 2MB Flash, 1MB RAM, 46 com. and analog interfaces, SMPS, DSI
PDF  252 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H747AI Datasheet(HTML) 210 Page - STMicroelectronics

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Electrical characteristics
STM32H747xI/G
200/242
DS12930 Rev 1
6.3.33
LCD-TFT controller (LTDC) characteristics
Unless otherwise specified, the parameters given in Table 114 for LCD-TFT are derived
from tests performed under the ambient temperature, fHCLK frequency and VDD supply
voltage summarized in Table 22: General operating conditions, with the following
configuration:
LCD_CLK polarity: high
LCD_DE polarity: low
LCD_VSYNC and LCD_HSYNC polarity: high
Pixel formats: 24 bits
Output speed is set to OSPEEDRy[1:0] = 11
Capacitive load CL=30 pF
Measurement points are done at CMOS levels: 0.5VDD
IO Compensation cell activated.
HSLV activated when VDD ≤ 2.7 V
VOS level set to VOS1
Table 114. LTDC characteristics(1)
Symbol
Parameter
Min
Max
Unit
fCLK
LTDC clock
output
frequency
2.7<VDD<3.6 V
20pF
-
150
MHz
2.7<VDD<3.6 V
133
1.62<VDD<3.6 V
90
DCLK
LTDC clock output duty cycle
45
55
%
tw(CLKH),
tw(CLKL)
Clock High time, low time
tw(CLK)//2-0.5
tw(CLK)//2+0.5
-
tv(DATA)
Data output valid time
2.7<VDD<3.6 V
-
0.5
th(DATA)
1.62<VDD<3.6 V
5
tv(DATA)
Data output hold time
0
-
tv(HSYNC),
tv(VSYNC),
tv(DE)
HSYNC/VSYNC/DE output
valid time
2.7<VDD<3.6 V
-
0.5
1.62<VDD<3.6 V
-
5
th(HSYNC),
th(VSYNC),
th(DE)
HSYNC/VSYNC/DE output hold time
0
-
1. Guaranteed by characterization results.



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