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STM32H747AI Datasheet(PDF) 207 Page - STMicroelectronics

Part # STM32H747AI
Description  Dual 32-bit Arm® Cortex®-M7 up to 480MHz and -M4 MCUs, up to 2MB Flash, 1MB RAM, 46 com. and analog interfaces, SMPS, DSI
PDF  252 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H747AI Datasheet(HTML) 207 Page - STMicroelectronics

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DS12930 Rev 1
197/242
STM32H747xI/G
Electrical characteristics
221
Table 112. DFSDM measured timing 1.62-3.6 V
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fDFSDMCLK
DFSDM
clock
1.62 < VDD < 3.6 V
-
-
133
MH
z
fCKIN
(1/TCKIN)
Input clock
frequency
SPI mode (SITP[1:0]=0,1),
External clock mode
(SPICKSEL[1:0]=0),
1.62 < VDD < 3.6 V
--
20
SPI mode (SITP[1:0]=0,1),
External clock mode
(SPICKSEL[1:0]=0),
2.7 < VDD < 3.6 V
--
20
SPI mode (SITP[1:0]=0,1),
Internal clock mode
(SPICKSEL[1:0]¹0),
1.62 < VDD < 3.6 V
--
20
SPI mode (SITP[1:0]=0,1),
Internal clock mode
(SPICKSEL[1:0]¹0),
2.7 < VDD < 3.6 V
--
20
fCKOUT
Output clock
frequency
1.62 < VDD < 3.6 V
-
-
20
DuCyCKOU
T
Output clock
frequency
duty cycle
1.62 < VDD < 3.6 V
45
50
55
%
twh(CKIN)
twl(CKIN)
Input clock
high and low
time
SPI mode (SITP[1:0]=0,1),
External clock mode
(SPICKSEL[1:0]=0),
1.62 < VDD < 3.6 V
TCKIN/2-0.5
TCKIN/2
-
ns
tsu
Data input
setup time
SPI mode (SITP[1:0]=0,1),
External clock mode
(SPICKSEL[1:0]=0),
1.62 < VDD < 3.6 V
1.5
-
-
th
Data input
hold time
SPI mode (SITP[1:0]=0,1),
External clock mode
(SPICKSEL[1:0]=0),
1.62 < VDD < 3.6 V
0.5
-
-
TManchester
Manchester
data period
(recovered
clock period)
Manchester mode (SITP[1:0]=2,3),
Internal clock mode
(SPICKSEL[1:0]¹0),
1.62 < VDD < 3.6 V
(CKOUTDIV+1)
* TDFSDMCLK
-
(2*CKOUTDIV)
* TDFSDMCLK



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