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STPMIC1 Datasheet(PDF) 60 Page - STMicroelectronics |
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STPMIC1 Datasheet(HTML) 60 Page - STMicroelectronics |
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60 / 140 page ![]() Table 17. Register data format b7 b6 b5 b4 b3 b2 b1 b0 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 Figure 62. I2C read operation Figure 63. I2C write operation 5.5.2 Non-volatile memory (NVM) General description The STPMIC1 built-in non-volatile memory provides a high flexibility to support a wide range of applications: Its straightforward write management through I2C allows customizing the STPMIC1 directly in final applications during the product development and mass production. The NVM is composed of 64 bits customizable parameters (accessible from shadow registers): • BUCKs and LDOs regulators: – Output voltage: to set the default output voltage at POWER-UP – POWER-UP sequence order: RANK regulator starts • General: – AUTO_TURN_ON: to power up the STPMIC1 automatically when the input voltage rises – VINOK_RISE threshold voltage: to select right power-up voltage – VINOK_HYST hysteresis voltage: to trigger power-down in case of VIN drop – LOCK_OCP: overcurrent protection bit that blocks the STPMIC1 in LOCK_OCP state in case of short-circuit or overload detection – PONKEY long key press functionality – can be configured to reset device – I²C slave address NVM read operation is performed automatically before each POWER_UP sequence to set control registers with default values and configure POWER_UP and POWER_DOWN sequence. NVM write operation can be performed several times at product level to: 1. Customize a pre-programmed device directly from application host processor via I²C interface (STPMIC1A,STPMIC1B, STPMIC1D and STPMIC1E) 2. To program a non-programmed device (STPMIC1C) into a final application by connecting a I2C host programmer to the product via JIG tester NVM macrocell is designed to provide high reliability: it is composed of complementary memory approach with two cells per bit (one direct cell and one complementary cell) and during each read operation, NVM controller check NVM content integrity. If integrity check fails, the STPMIC1 does not start up. STPMIC1 Programming DS12792 - Rev 7 page 60/140 |
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